Dynamic reallocation of processing resources for redundant functionality
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H04B-017/00
출원번호
US-0083419
(2002-02-26)
발명자
/ 주소
LeCren,Andrew Thomas
출원인 / 주소
Motorola, Inc.
인용정보
피인용 횟수 :
17인용 특허 :
11
초록▼
A method of and multi-processor based apparatus for dynamically reallocating processors to provide redundant functionality, the method including detecting a fault in a first function having a first priority, the first function supported by a first processor; selecting a second processor supporting a
A method of and multi-processor based apparatus for dynamically reallocating processors to provide redundant functionality, the method including detecting a fault in a first function having a first priority, the first function supported by a first processor; selecting a second processor supporting a second function having a second priority; and reallocating, responsive to the fault, the second processor to support the first function when a predetermined relationship corresponding to the first priority and the second priority exists, this relationship including, for example, one or more of the first exceeding the second priority and the type and frequency of occurrence of the fault.
대표청구항▼
What is claimed is: 1. A method in a multi-processor based apparatus of dynamically reallocating processors to provide redundant functionality, the method including the steps of: detecting a fault in a first function, the first function having a first priority, said first function supported by a f
What is claimed is: 1. A method in a multi-processor based apparatus of dynamically reallocating processors to provide redundant functionality, the method including the steps of: detecting a fault in a first function, the first function having a first priority, said first function supported by a first processor; selecting a second processor supporting a second function different than the first function, the second function having a second priority; and reallocating, responsive to said fault, said second processor to support said first function when a predetermined relationship corresponding to said first priority and said second priority exists, wherein said step of reallocating said second processor to support said first function occurs when said predetermined relationship includes said first priority exceeding said second priority, wherein said second processor is selected from a multiplicity of second processors supporting a multiplicity of said second functions and wherein said step of reallocating occurs when said predetermined relationship further corresponds to having said multiplicity of said second processors satisfy a threshold number of said second processors. 2. The method of claim 1 further including a step of selecting a third processor supporting a third function having a third priority that exceeds said second priority but is less than said first priority and reallocating said third processor to support said first function when said multiplicity of said second processors does not satisfy said threshold number of said second processors. 3. A multi-processor based apparatus arranged and constructed to dynamically reallocate processors to provide redundant functionality, the apparatus comprising in combination: a first processor supporting a first function, the first function having a first priority; means for detecting a fault in said first function; a second processor supporting a second function different from the first function, the second function having a second priority; and means for reallocating, responsive to said fault, said second processor to support said first function when a predetermined relationship corresponding to said first priority and said second priority exists, wherein said reallocating said second processor to support said first function occurs when said predetermined relationship includes said first priority exceeding said second priority, wherein said second processor is selected from a multiplicity of second processors supporting a multiplicity of said second functions and wherein said reallocating said second processor occurs when said predetermined relationship further corresponds to having said multiplicity of said second processors satisfy a threshold number of said second processors. 4. The apparatus of claim 3 further including a third processor supporting a third function having a third priority that exceeds said second priority but is less than said first priority and reallocating said third processor to support said first function when said multiplicity of said second processors does not satisfy said threshold number of said second processors. 5. A base station controller (BSC) for controlling base stations and inter-coupling the base stations and a network switch in a wireless phone network, the base station controller being multi-processor based and arranged and constructed to dynamically reallocate processors to provide redundant functionality within the BSC, the BSC comprising in combination: a mobility manager for handling all base station resource assignments and a transcoder for supporting all calls, said transcoder further including; means for inter-coupling the base stations and the network switch; a first operations and maintenance processor (OMP) for providing control and system level functions for the transcoder, said control and system level functions having a first priority; means for detecting a fault in said control and system level functions; a call processing processor (CPP) for managing transcoder resources that are assigned by said OMP to establish and handoff calls, said managing having a second priority; and means for reallocating, responsive to said fault, said CPP to support said control and system level functions when a predetermined relationship corresponding to said first priority and said second priority exists. 6. The BSC of claim 5 wherein said reallocating said CPP to support said control and system level functions occurs when said predetermined relationship includes said first priority exceeding said second priority and further corresponds to a type of fault, said reallocating said CPP occurring immediately when said type of said fault is major. 7. The BSC of claim 5 wherein said reallocating said CPP to support said control and system level functions occurs when said predetermined relationship includes said first priority exceeding said second priority and further corresponds to a type of fault, said reallocating said CPP is delayed for a predetermined time sufficient to allow for a possible recovery of said first OMP from said fault when said type of said fault is minor unless said fault has repeated a predetermined number of times. 8. The BSC of claim 5 wherein said CPP is selected from a multiplicity of CPPs for said managing a multiplicity of said transcoder resources and wherein said reallocating said CPP occurs when said predetermined relationship includes said first priority exceeding said second priority and further corresponds to having said multiplicity of said CPPs satisfy a threshold number of said CPPs. 9. The BSC of claim 8 further including a front end processor (FEP) for inter-coupling said mobility manager with the base stations and said first OMP, said inter-coupling having a third priority that exceeds said second priority but is less than said first priority and means for reallocating further for reallocating said FEP to support said control and system level functions when said multiplicity of said CPPs does not satisfy said threshold number of said CPPs.
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이 특허에 인용된 특허 (11)
Rozenstrauch Alexander (Buffalo Grove IL) Erickson Paul M. (Palatine IL), Apparatus for providing fault tolerance in a radio communication system.
Bishop Thomas P. (Aurora IL) Butvila Jonas (LaGrange IL) Fitch David J. (Naperville IL) Hansen Robert C. (Wheaton IL) Schmitt David A. (Glen Ellyn IL) Surratt Grover T. (West Chicago IL), Reconfigurable dual processor system.
Bilgic, Attila; Le, Thuyen; Rohfleisch, Bernhard, Distribution of tasks as a function of the operating mode in mobile communication terminals having two or more microprocessors.
Kaushik, Shivnandan D.; Horigan, John W.; Naveh, Alon; Crossland, James B., Mechanism for processor power state aware distribution of lowest priority interrupts.
Stange, Kent; Hess, Richard; Kelley, Gerald B; Rogers, Randy, Method and system for redundancy management of distributed and recoverable digital control system.
Inoue, Takashi; Inoguchi, Takeshi, Multiprocessor system enabling controlling with specific processor under abnormal operation and control method thereof.
Kunugi, Takeshi; Hattori, Reiko; Hasegawa, Noboru; Watanabe, Teruyoshi, Wireless communication system, wireless base station, mobile station, and wireless communication method.
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