IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0317571
(2002-12-12)
|
우선권정보 |
EP-01000760(2001-12-17) |
발명자
/ 주소 |
- Amtmann,Franz
- Cernusca,Michael
|
출원인 / 주소 |
- Koninklijke Phillips Electronics N.V.
|
인용정보 |
피인용 횟수 :
28 인용 특허 :
2 |
초록
▼
A communication station (1) and a transponder ( 2) are designed in such a way that an inventorizing operation can be performed using various memory areas (36, 37, 38, 39, 40), which are provided in an addressable memory (35) of the transponder ( 2), and in which different identification data (UIDDAT
A communication station (1) and a transponder ( 2) are designed in such a way that an inventorizing operation can be performed using various memory areas (36, 37, 38, 39, 40), which are provided in an addressable memory (35) of the transponder ( 2), and in which different identification data (UIDDATA, USERDATA) is stored.
대표청구항
▼
The invention claimed is: 1. A transponder, comprising: a transceiver; an addressable memory having a first portion in which first identification data is stored, a second portion in which second identification data is stored, and a third portion in which indirect addressing data is stored; and a co
The invention claimed is: 1. A transponder, comprising: a transceiver; an addressable memory having a first portion in which first identification data is stored, a second portion in which second identification data is stored, and a third portion in which indirect addressing data is stored; and a control logic unit coupled to the transceiver and the addressable memory, and the control unit, responsive to a command received by way of the transceiver, retrieves indirect addressing data from the third portion of the addressable memory and, based at least in part on the retrieved indirect addressing data, retrieves at least one of first or second identification data from the addressable memory, and the control logic unit including a time window determination means, the time window determination means coupled to receive identification data so retrieved from the addressable memory, and further coupled to receive an indication of the one or more addresses in the addressable memory from which the first or second identification data is retrieved. 2. The transponder of claim 1, wherein the time window determination means, responsive to at least one of the retrieved identification data or the received indication, specifies a transmission parameter, and wherein, responsive to the transmission parameter, the transceiver transmits a transmission signal associated with inventorizing the transponder. 3. The transponder of claim 2, wherein the time window determination means specifies a transmission parameter comprising at least one of a starting time of time windows, a number of time windows, an encoding type for the transmission signal, or a subcarrier signal for modulating the transmission signal. 4. The transponder of claim 2, wherein the transceiver transmits a transmission signal representative of identification data retrieved from the addressable memory, in whole or in part. 5. The transponder of claim 2, wherein the transceiver transmits a transmission signal representative of data exclusive of the identification data retrieved from the addressable memory. 6. The transponder of claim 2, wherein the time window determination means is further coupled to receive an indication of selected of the one or more addresses to be employed in specifying a transmission parameter. 7. The transponder of claim 1, wherein the transceiver transmits a transmission signal associated with inventorizing the transponder, the transmission signal being representative of identification data retrieved from the addressable memory, in whole or in part. 8. The transponder of claim 7, wherein the transmission signal represents first identification data, the first identification data being retrieved from plural memory areas of the first portion. 9. The transponder of claim 7, wherein the transmission signal represents second identification data, the second identification data being retrieved from plural memory areas of the second portion. 10. The transponder of claim 7, wherein the transmission signal represents first and second identification data. 11. The transponder of claim 10, wherein at least one or the first and second identification data is retrieved from plural memory areas of the respective first or second portion. 12. The transponder of claim 7, wherein the control logic unit, responsive to a masking signal, selects among retrieved identification data, or parts thereof, for representation in the transmission signal. 13. The transponder of claim 12, wherein at least one of the first and second portions comprise plural memory areas, each such memory area having an address and storing identification data, and wherein the control logic unit, responsive to the masking signal, selects among retrieved identification data by the one or more, respective memory areas from which identification data is retrieved. 14. The transponder of claim 13, wherein the control logic unit, responsive to the masking signal, selects one or more parts of each retrieved identification data. 15. The transponder of claim 14, wherein the control logic unit selects among retrieved identification data, in whole or selected parts, responsive to system parameters characterizing the application of the transponder. 16. The transponder of claim 7, wherein the transceiver transmits the transmission signal in a time window determined by the time window determination means. 17. The transponder of claim 1, wherein the first identification data comprises a characteristic unique identification data block and the second identification data comprises a user data block. 18. The transponder of claim 17 wherein the user data block includes one or more of product code, product type, sales price, date of manufacture, country of manufacture, and expiry date. 19. An integrated circuit, associated with a coil disposed external to the integrated circuit, comprising: a transceiver circuit adapted to be coupled to the coil; an addressable memory having a first portion in which first identification data is stored, a second portion in which second identification data is stored and a third portion in which indirect addressing data is stored, and a control logic unit coupled to the transceiver circuit and the addressable memory, and the control unit, responsive to a command received by way of the transceiver circuit, retrieves indirect addressing data from the third portion of the addressable memory, and the control unit including a time window determination means, the time window determination means coupled to receive identification data from the addressable memory, and further coupled to receive an indication of an address in the addressable memory from which the identification data is retrieved. 20. The integrated circuit of claim 19, wherein the transceiver circuit transmits a signal at a time determined by the time window determination means.
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