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특허 상세정보

MyON담기
내보내기 페이스북 공유 카카오톡 공유

Method of improving copper pad adhesion

특허상세정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) H01L-031/00    H01L-023/52    H01L-021/44    H01L-021/02   
미국특허분류(USC) 257/779; 257/459; 257/758; 257/761; 438/108; 438/612
출원번호 US-0755282 (2001-01-08)
발명자 / 주소
출원인 / 주소
대리인 / 주소
    Haynes and Boone, LLP
인용정보 피인용 횟수 : 11  인용 특허 : 53
초록
▼

This invention relates to a new improved method and structure in the fabricating of aluminum metal pads. The formation special aluminum bond pad metal structures are described which improve adhesion between the tantalum nitride pad barrier layer and the underlying copper pad metallurgy by a special interlocking bond pad structure. It is the object of the present invention to provide a process wherein a special grid of interlocking via structures is placed in between the underlying copper pad metal and the top tantalum nitride pad barrier layer providing ...

대표
청구항
▼

The invention claimed is: 1. A bond pad structure, comprising: a semiconductor substrate; a passivating layer forming multiple free-standing vertical islands to provide interlocking grid structures over said semiconductor substrate, wherein the vertical islands are separated by openings in said passivating layer; a continuous barrier layer formed of tantalum nitride over said vertical islands of said passivating layer and in said openings; and a conducting pad formed within said openings and over said interlocking grid structures and over said barrier l...

이 특허에 인용된 특허 (53)

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이 특허를 인용한 특허 피인용횟수: 11

  1. Hirano, Koichi; Shiraishi, Tsukasa; Nakatani, Seiichi; Ogawa, Tatsuo. Circuit board, method for manufacturing the same, and semiconductor device. USP2011118063486.
  2. Yang, Chih-Chao; Edelstein, Daniel C.; Molis, Steven E.. Enhanced diffusion barrier for interconnect structures. USP2013048420531.
  3. Yang, Chih-Chao; Edelstein, Daniel C.; Molis, Steven E.. Enhanced diffusion barrier for interconnect structures. USP2014068742581.
  4. Kuo,Yian Liang; Lin,Yu Chang. Integrated circuit package bond pad having plurality of conductive members. USP2008057372153.
  5. Bohr,Mark T.; Martell,Robert W.. Method and apparatus for improved power routing. USP2007047208402.
  6. Bohr,Mark T.; Martell,Robert W.. Method and apparatus for improved power routing. USP2007027180195.
  7. Fumitake, Mieno. Method for manufacturing twin bit structure cell with silicon nitride layer. USP2015069064804.
  8. Wood, Alan G.; Ireland, Philip J.. Methods of forming through-substrate interconnects. USP2014108853072.
  9. Wang, Liang; Mohammed, Ilyas; Haba, Belgacem. Micro mechanical anchor for 3D architecture. USP2017119832887.
  10. Wood, Alan G.; Ireland, Philip J.. Semiconductor constructions. USP20181110121738.
  11. Wood, Alan G.; Ireland, Philip J.. Semiconductor constructions having through-substrate interconnects. USP2017029583419.

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