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Methods of forming power semiconductor devices having laterally extending base shielding regions 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/336
  • H01L-021/02
  • H01L-021/332
  • H01L-021/4763
출원번호 US-0936757 (2004-09-08)
발명자 / 주소
  • Baliga,Bantval Jayant
출원인 / 주소
  • Silicon Semiconductor Corporation
대리인 / 주소
    Myers Bigel Sibley &
인용정보 피인용 횟수 : 16  인용 특허 : 89

초록

Methods of forming power semiconductor devices include forming a semiconductor substrate having a drift region of first conductivity type therein and a transition region of first conductivity type that extends between the drift region and a first surface of the semiconductor substrate. A gate electr

대표청구항

That which is claimed is: 1. A method of forming a vertical power device, comprising the steps of: forming a semiconductor substrate having a drift region of first conductivity type therein and a transition region of first conductivity type that extends between the drift region and a first surface

이 특허에 인용된 특허 (89)

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이 특허를 인용한 특허 (16)

  1. Takahashi, Ryoji, Electronic switching device.
  2. Laven, Johannes Georg; Philippou, Alexander; Schulze, Hans-Joachim; Jaeger, Christian; Baburske, Roman; Vellei, Antonio, Insulated gate bipolar transistor with mesa sections between cell trench structures and method of manufacturing.
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  4. Laven, Johannes Georg; Baburske, Roman; Jaeger, Christian, Semiconductor device and insulated gate bipolar transistor with barrier regions.
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  14. Chen, Mei-Ling; Kuo, Hung-Hsin; Chao, Kou-Liang, Trench isolation MOS P-N junction diode device and method for manufacturing the same.
  15. Chen, Mei-Ling; Kuo, Hung-Hsin; Chao, Kuo-Liang, Trench isolation MOS P-N junction diode device and method for manufacturing the same.
  16. Chen, Mei-Ling; Kuo, Hung-Hsin; Chao, Kuo-Liang, Trench isolation MOS P-N junction diode device and method for manufacturing the same.
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