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Kafe 바로가기국가/구분 | United States(US) Patent 등록 |
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국제특허분류(IPC7판) |
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출원번호 | US-0865042 (2004-06-10) |
발명자 / 주소 |
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 | 피인용 횟수 : 50 인용 특허 : 277 |
A method and apparatus for depositing a tantalum nitride barrier layer is provided for use in an integrated processing tool. The tantalum nitride is deposited by atomic layer deposition. The tantalum nitride is removed from the bottom of features in dielectric layers to reveal the conductive materia
A method and apparatus for depositing a tantalum nitride barrier layer is provided for use in an integrated processing tool. The tantalum nitride is deposited by atomic layer deposition. The tantalum nitride is removed from the bottom of features in dielectric layers to reveal the conductive material under the deposited tantalum nitride. Optionally, a tantalum layer may be deposited by physical vapor deposition after the tantalum nitride deposition. Optionally, the tantalum nitride deposition and the tantalum deposition may occur in the same processing chamber.
What is claimed is: 1. A method of forming a metal interconnect on a semiconductor substrate, comprising; cleaning features formed in a dielectric layer and exposing a conductive material underlying the dielectric layer by generating a plasma in a remote plasma source, delivering radicals from the
What is claimed is: 1. A method of forming a metal interconnect on a semiconductor substrate, comprising; cleaning features formed in a dielectric layer and exposing a conductive material underlying the dielectric layer by generating a plasma in a remote plasma source, delivering radicals from the plasma to a first process chamber which contains the substrate, and contacting the features formed in the dielectric layer with the radicals prior to a barrier layer deposition; depositing a tantalum nitride layer by atomic layer deposition within the features at a pressure between 1 and 10 Torr at a temperature between 200 and 300째 C. in a second process chamber; depositing a tantalum layer by physical vapor deposition over the tantalum nitride layer in a third process chamber; plasma etching the tantalum layer and the tantalum nitride in a fourth process chamber to remove at least a portion of the tantalum layer and the tantalum nitride layer at the bottom of the feature to reveal the conductive material; optionally depositing additional tantalum or copper by physical vapor deposition on the tantalum layer; and depositing a seed layer over the conductive material and the tantalum layer in a fifth processing chamber, wherein the first processing chamber, the second processing chamber, the third processing chamber, the fourth processing chamber, and the fifth processing chamber are located in an integrated tool. 2. The method of claim 1, wherein the tantalum nitride deposition is performed with a tantalum containing precursor selected from the group comprising t-butylimino-tris(diethylamino)tantalum, pentakis(ethylmethylamino)tantalum, pentakis(dimethylamino)tantalum, pentakis(diethylamino)tantalum, t-butyliminotris(diethyl methylamino) tantalum, t-butylimino-tris(dimethylamino)tantalum, bis(cyclopentadienyl) tantalum trihydride, and bis(methylcyclopentadienyl)tantalum trihydride. 3. The method of claim 1, wherein the tantalum nitride deposition is performed with a nitrogen containing precursor selected from the group comprising ammonia, hydrazine, methylhydrazine, dimethylhydrazine, t-butylhydrazine, phenylhydrazine, azoisobutane, and ethylazide. 4. The method of claim 1, wherein the tantalum nitride deposition is performed with the tantalum containing precursor pulsed into the chamber at 100 to 3,000 sccm for 2.0 seconds or less. 5. The method of claim 1, wherein the tantalum nitride deposition is performed with the nitrogen containing precursor pulsed into the chamber at 100 to 3,000 sccm for 2.0 seconds or less. 6. The method of claim 1, wherein the tantalum nitride deposition is performed with argon flowing continuously into the chamber at 1,000 to 10,000 sccm. 7. The method of claim 1, wherein the plasma etching is performed with a gas selected from the group consisting of argon, nitrogen, and hydrogen. 8. The method of claim 1, wherein the plasma etching is performed with RF power of 100 to 1000 W for 1 to 20 seconds. 9. The method of claim 1, wherein the plasma etching is performed with a directional argon plasma. 10. The method of claim 1, further comprising depositing additional metal by physical vapor deposition on the tantalum layer. 11. The method of claim 16, further comprising depositing a bulk metal layer. 12. The method of claim 1, wherein the third and fourth process chambers are the same chamber. 13. The method of claim 1, wherein the fourth and fifth process chambers are the same chamber. 14. The method of claim 10, wherein the metal is selected from the group consisting of copper, copper aluminum, copper tin, tantalum, tungsten, thallium, cobalt, titanium, and aluminum. 15. The method of claim 1, wherein the seed layer is deposited by a method selected from the group consisting of chemical vapor deposition, physical vapor deposition, electroplating, and electroless plating. 16. The method of claim 1, wherein the seed layer comprises a metal selected from the group consisting of copper, copper aluminum, copper tin, tantalum, tungsten, thallium, cobalt, titanium, and aluminum. 17. The method of claim 1, further comprising a preliminary substrate surface cleaning with nitrogen before cleaning features formed in a dielectric layer and exposing a conductive material underlying the dielectric layer by generating a plasma in a remote plasma source, delivering radicals from the plasma to a first process chamber which contains the substrate, and contacting the features formed in the dielectric layer with the radicals prior to a barrier layer deposition. 18. A method of forming a metal interconnect on a semiconductor substrate, comprising; cleaning features formed in a dielectric layer and exposing a conductive material underlying the dielectric layer by generating a plasma in a remote plasma source, delivering radicals from the plasma to a first process chamber which contains the substrate, and contacting the features formed in the dielectric layer with the radicals prior to a barrier layer deposition; depositing a tantalum nitride layer by atomic layer deposition within the features at a pressure between 1 and 10 Torr at a temperature between 200 and 300째 C. in a second process chamber; depositing a tantalum layer by physical vapor deposition over the tantalum nitride layer in a third process chamber; plasma etching the tantalum layer and the tantalum nitride in the third process chamber to remove at least a portion of the tantalum layer and the tantalum nitride layer at the bottom of the feature to reveal the conductive material; optionally depositing additional tantalum or copper by physical vapor deposition on the tantalum layer; and depositing a seed layer over the conductive material and the tantalum layer in a fourth processing chamber, wherein the first processing chamber, the second processing chamber, the third processing chamber, and the fourth processing chamber are located in an integrated tool. 19. The method of claim 18, wherein the cleaning is performed with a feed gas consisting of 0 to about 10 percent hydrogen and about 90 to 100 percent helium. 20. The method of claim 18, wherein the plasma etching is performed with a directional argon plasma. 21. The method of claim 18, further comprising depositing additional metal by physical vapor deposition to the tantalum layer. 22. The method of claim 18, wherein the second and third process chambers are the same chamber. 23. The method of claim 18, wherein the third and fourth process chambers are the same chamber. 24. The method of claim 18, wherein the seed layer is deposited by a method selected from the group consisting of chemical vapor deposition, physical vapor deposition, electroplating, and electroless plating. 25. The method of claim 18, further comprising depositing additional metal by physical vapor deposition to the tantalum layer. 26. The method of claim 25, further comprising depositing a bulk metal layer. 27. A method of forming a metal interconnect on a semiconductor substrate, comprising: depositing a tantalum nitride barrier layer by atomic layer deposition within the features at a pressure between 1 and 10 Torr at a temperature between 200 and 300째C. in a first process chamber; depositing a second barrier layer over the tantalum nitride barrier layer in a second process chamber; plasma etching the second barrier layer and the tantalum nitride barrier layer in a third process chamber to remove at least a portion of the second barrier layer and the tantalum nitride barrier layer at a bottom of the feature to reveal the conductive material; and depositing a seed layer over the conductive material and the second barrier layer in a fourth processing chamber, wherein the first processing chamber, the second processing chamber, the third processing chamber, and the fourth processing chamber are located in an integrated tool. 28. The method of claim 27, wherein the tantalum nitride deposition is performed with a tantalum containing precursor selected from the group consisting of t-butylimino-tris(diethylamino)tantalum, pentakis (ethylmethylamino)tantalum, pentakis(dimethylamino)tantalum, pentakis (diethylamino)tantalum, t-butylimiotris (diethyl methylamino) tantalum, t-butylimino-tris(dimethylamino)tantalum, bis(cyclopentadienyl) tantalum trihydride, and bis(methylcyclopentadienyl) tantalum trihydride. 29. The method of claim 27, wherein the tantalum nitride deposition is performed with a nitrogen containing precursor selected from the group consisting of ammonia, hydrazine, methylhydrazine, dimethylhydrazine, t-butylhydrazine, phenylhydrazine, azoisobutane, and ethylazide. 30. The method of claim 27, wherein the plasma etching is performed with a gas selected from the group consisting of argon, nitrogen, and hydrogen. 31. The method of claim 27, wherein the plasma etching is performed with a directional argon plasma. 32. The method of claim 27, further comprising depositing additional metal by physical vapor deposition on the second barrier layer. 33. The method of claim 32, further comprising depositing a bulk metal layer. 34. The method of claim 27, wherein the third and fourth process chambers are the same chamber. 35. The method of claim 27, wherein the fourth and fifth process chambers are the same chamber. 36. The method of claim 32, wherein the metal is selected from the group consisting of copper, copper aluminum, copper tin, tantalum, tungsten, thallium, cobalt, titanium, and aluminum. 37. The method of claim 27, wherein the seed layer is deposited by a method selected from the group consisting of chemical vapor deposition, physical vapor deposition, electroplating, and electroless plating. 38. The method of claim 27, wherein the seed layer comprises a metal selected from the group consisting of copper, copper aluminum, copper tin, tantalum, tungsten, thalium, cobalt, titanium, and aluminum. 39. The method of claim 27, further comprising a preliminary substrate surface cleaning with nitrogen before cleaning features formed in a dielectric layer and exposing a conductive material underlying the dielectric layer by generating a plasma in a remote plasma source, delivering radicals from the plasma to a first process chamber which contains the substrate, and contacting the features formed in the dielectric layer with radicals prior to a barrier layer deposition. 40. A method of forming a metal interconnect on a semiconductor substrate, comprising; cleaning features formed in a dielectric layer and exposing a conductive material underlying the dielectric layer by generating a plasma in a remote plasma source, delivering radicals from the plasma to a first process chamber which contains the substrate, and contacting the features formed in the dielectric layer with the radicals prior to a barrier layer deposition; depositing a tantalum nitride barrier layer by atomic layer deposition within the features at a pressure between 1 and 10 Torr at a temperature between 200 and 300째C. in a second process chamber; depositing a second barrier layer by physical vapor deposition over the tantalum nitride barrier layer in a third process chamber; optionally depositing additional tantalum or copper by physical vapor deposition on the second barrier layer; and depositing a seed layer over the conductive material and the second barrier layer in a fourth processing chamber, wherein the first processing chamber, the second processing chamber, the third processing chamber, and the fourth processing chamber are located in an integrated tool. 41. The method of claim 40, wherein the cleaning is performed with a feed gas consisting of 0 to about 10 percent hydrogen and about 90 to 100 percent helium. 42. The method of claim 40, wherein the tantalum nitride barrier deposition is performed with a tantalum containing precursor selected from the group consisting of t-butylimino-tris(diethylamino) tantalum, pentakis (ethylmethylamino)tantalum, pentakis(dimethylamino) tantalum, pentakis (diethylamino)tantalum, t-butyliminotris(diethyl methylamino)tantalum, t-butylimino-tris(dimethylamino)tantalum, bis(cyclopentaadienyl)tantalum, and bis(methylcyclopentadienyl) tantalum trihydride. 43. The method of claim 40, wherein the tantalum nitride barrier deposition is performed with a nitrogen containing precursor selected from the group consisting of ammonia, hydrazine, methylhydrazine, dimethylhydrazine, t-butylhydrazine, phenylhydrazine, azoisobutane, and ethylazide. 44. The method of claim 40, wherein the tantalum nitride barrier deposition is performed with the tantalum containing precursor pulsed into the chamber at 100 to 3,000 sccm for 2.0 seconds or less. 45. The method of claim 40, wherein the tantalum nitride barrier deposition is performed with the nitrogen containing precursor pulsed into the chamber at 100 to 3,000 sccm for 2.0 seconds or less. 46. The method of claim 40, wherein the tantalum nitride barrier deposition is performed with argon flowing continuously into the chamber at 1,000 to 10,000 sccm. 47. The method of claim 40, wherein the second barrier layer is tantalum and deposition is performed at 10 to 50째C. and wafer bias is 100 to 1000W. 48. The method of claim 40, further comprising depositing additional metal by physical vapor deposition on the second barrier layer. 49. The method of claim 48, further comprising depositing a bulk metal layer. 50. The method of claim 40, wherein the third and fourth process chambers are the same chamber. 51. The method of claim 40, wherein the fourth and fifth process chambers are the same chamber. 52. The method of claim 48, wherein the metal is selected from the group consisting of copper, copper aluminum, copper tin, tantalum, tungsten, thallium, cobalt, titanium, and aluminum. 53. The method of claim 40, wherein the seed layer is deposited by a method selected from the group consisting of chemical vapor deposition, physical vapor deposition, electroplating, and electroless plating. 54. The method of claim 40, wherein the seed layer comprises a metal selected from the group consisting of copper, copper aluminum, copper tin, tantalum, tungsten, thallium, cobalt, titanium, and aluminum. 55. The method of claim 40, further comprising a preliminary substrate surface cleaning with nitrogen before cleaning features formed in a dielectric layer and exposing a conductive material underlying the dielectric layer by generating a plasma in a remote plasma source, delivering radicals from the plasma to a first process chamber which contains the substrate, and contacting the features formed in the dielectric layer with the radicals prior to a barrier layer deposition.
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