IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0179645
(2002-06-24)
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발명자
/ 주소 |
- Schelm,Jacob
- Shabtay,Ophir
- Avital,Yaniv
- Reshef,Ehud
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출원인 / 주소 |
- Comsys Communication &
- Signal Processing Ltd.
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
24 인용 특허 :
19 |
초록
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A method and apparatus for estimating channel tap delays of multipath components in a CDMA received signal. The search for the tap delays are split into two phases namely, a phase 1 and a phase 2 search. The phase 1 search is a coarse resolution quick search adapted to generate a rough estimate of
A method and apparatus for estimating channel tap delays of multipath components in a CDMA received signal. The search for the tap delays are split into two phases namely, a phase 1 and a phase 2 search. The phase 1 search is a coarse resolution quick search adapted to generate a rough estimate of the location of the tap delays. During this phase, the candidate codes are summed and the input signal correlated with the code sum creating an ambiguity in the code associated with the multipath. A finer resolution slower phase 2 search resolves the code ambiguity present in the initial rough estimates of the phase 1 search. Additional phase 2 correlations may be performed to implement a code-tracking loop.
대표청구항
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What is claimed is: 1. A method of channel tap delay estimation of multipath components in an input signal for use in a spread spectrum communications system, said method comprising the steps of: summing a plurality of codes to generate a code sum therefrom; determining the delay associated with o
What is claimed is: 1. A method of channel tap delay estimation of multipath components in an input signal for use in a spread spectrum communications system, said method comprising the steps of: summing a plurality of codes to generate a code sum therefrom; determining the delay associated with one or more multipath components within said input signal by performing a first set of correlations of said code sum with said input signal and delayed versions thereof; determining the code associated with a multipath component by performing a second set of correlations of one or more delayed versions of said input signal with each of said plurality of codes, wherein one or more said delayed versions of said input signal are selected in accordance with the results of said first set of correlations; and declaring the existence of a multipath component at a delay and code in accordance with the second correlation results. 2. The method according to claim 1, wherein said plurality of codes comprise any combination of different codes or same codes with different offsets. 3. The method according to claim 1, wherein said first set of correlations are performed at a first search resolution and said second set of correlations are performed at a second search resolution, wherein said second search resolution is finer than said first search resolution. 4. The method according to claim 1, wherein said first set of correlations are performed at a chip delay spacing and said second set of correlations are performed at a fractional chip spacing. 5. The method according to claim 4, wherein said fraction chip spacing comprises 쩍 chip spacing. 6. The method according to claim 1, further comprising the step of periodically tracking one or more estimated multipath components in accordance with the results of a third set of correlations of the code corresponding thereto with a plurality of adjacently located delayed versions of said input signal centered around estimates of early and late versions of said input signal. 7. The method according to claim 1, wherein said first set of correlations and said second set or correlations are performed in accordance with a priori information. 8. The method according to claim 1, further comprising the step of utilizing channel tap related channel estimation information. 9. The method according to claim 1, adapted to be implemented in an Application Specific Integrated Circuit (ASIC). 10. The method according to claim 1, adapted to be implemented in a Field Programmable Gate Array (FPGA). 11. The method according to claim 1, adapted to be implemented partially in hardware and partially in software. 12. The method according to claim 1, wherein said set of first correlations arc performed on hard-limited versions of said input signal. 13. The method according to claim 1, wherein said spread spectrum communications system comprises a code division multiple access (CDMA) communication system. 14. The method according to claim 1, wherein the declaration of a multipath component at a delay and code is made in accordance with the second correlation results that exceed a threshold. 15. The method according to claim 1, wherein a number of candidate delays are selected From the results of the first set of correlations. 16. A method of channel tap delay estimation of multipath components in an input signal for use in a spread spectrum communications system, said method comprising the steps of: summing a plurality of codes to generate a code sum therefrom; performing a first set of correlations of said code sum with said input signal wherein said first set of correlations are performed over a delay search area; selecting one or more candidates from said first set of correlations based on a first criteria; for each candidate, performing a second set of correlations of said input signal with each code; and declaring the existence of a multipath component channel tap at a delay and code horn the results of said second set of correlations based on a second criteria. 17. The method according to claim 16, wherein said plurality of codes comprise any combination of different codes or same codes with different offsets. 18. The method according to claim 16, wherein said first set of correlations are performed at a first search resolution and said second set of correlations are performed at a second search resolution, wherein said second search resolution is finer than said first search resolution. 19. The method according to claim 16, wherein said first set of correlations are performed at a chip delay spacing and said second set of correlations are performed at a fractional chip spacing. 20. The method according to claim 19, wherein said fraction chip spacing comprises 쩍 chip spacing. 21. The method according to claim 16, wherein said delay search area covers a length of time at least the duration of expected multipath component delay spread. 22. The method according to claim 16, further comprising the step of periodically tracking one or more estimated multipath components in accordance with the results of a third set of correlations of the code corresponding thereto with a plurality of adjacently located delayed versions of said input signal centered around an estimate of an on-time delayed version of said input signal. 23. The method according to claim 16, adapted to be implemented in an Application Specific Integrated Circuit (ASIC). 24. The method according to claim 16, adapted to be implemented in a Field Programmable Gate Array (FPGA). 25. The method according to claim 16, adapted to be implemented partially in hardware and partially in software. 26. The method according to claim 16, wherein said set of first correlations are performed on hard-limited versions of said input signal. 27. The method according to claim 16, wherein said number of codes is non-fixed. 28. The method according to claim 16, wherein said spread spectrum communications system comprises a code division multiple access (CDMA) communication system. 29. The method according to claim 16, wherein said first criteria and said second criteria are based on thresholds. 30. The method according to claim 16, wherein said first criteria is based on selecting a fixed number or candidate results. 31. The method according to claim 16, wherein said second criteria is based on selecting a fixed number of candidate results. 32. A method of channel tap delay estimation of multipath components in an input signal for use in a spread spectrum communications system, said method comprising the steps of: estimating the delays associate with a plurality of multipath components present in an input signal by performing a first set of correlations on said input signal and on delayed versions thereof with a sum of N codes the results of which indicate the presence of a multipath component at a particular delay having one of said N codes, wherein N is a positive integer; and resolving the code ambiguity in the results of said estimating step by performing a second set of correlations of said input signal at the estimated multipath delays found during said estimating step with each of said N codes individually. 33. The method according to claim 32, wherein said step of estimating comprises the step of indicating the presence of a multipath component at a particular delay if a correlation result in said tint set of correlations corresponding thereto exceeds a single threshold or a set of thresholds wherein each threshold is associated with a different correlation result. 34. The method according to claim 32, wherein said step of resolving comprises the step of indicating the code associated with a particular multipath component if a correlation result in said second set of correlations exceeds a threshold. 35. The method according to claim 32, further comprising the step of periodically tracking said multipath components by attempting to maintain early, on-time and late correlations of said input signal arid the code corresponding to the particular multipath component. 36. The method according to claim 32, wherein the step of resolving comprises the step of fine-tuning the estimates of the delays found in said step of estimating. 37. The method according to claim 32, further comprising the step of performing said set of first correlations and said set of second correlations in a repeating manner so as to achieve a steady state balance whereby delays arid codes associated therewith are detected and tracked for a plurality of multipath components. 38. The method according to claim 32, adapted to be implemented in an Application Specific Integrated Circuit (ASIC). 39. The method according to claim 32, adapted to be implemented in a Field Programmable Gate Array (FPGA). 40. The method according to claim 32, adapted to be implemented partially in hardware and partially in software. 41. The method according to claim 32, wherein said set of first correlations arc performed on hard-limited versions of said input signal. 42. The method according to claim 32, wherein spread spectrum communications system comprises a code division multiple access (CDMA) communication system. 43. An apparatus for estimating a channel tap delay of multipath components in an input signal for use in a spread spectrum communications system, comprising: code summing means for summing a plurality of N codes to generate a code sum therefrom, wherein N is a positive integer; first correlation means for determining the delay associated with one or more multipath components within said input signal by performing a first set of correlations of said code sum with said input signal and delayed versions thereof; second correlation means for determining the code associated with a multipath component by performing a second set of correlations of one or more delayed versions of said input signal with each of said N codes, wherein one or more said delayed versions of said input signal are selected in accordance with the results of said first set of correlations; and control means operative to declare the existence of a multipath component at a delay and code in accordance with second correlation results. 44. The apparatus according to claim 43, further comprising code tracking means operative to track said multipath components by attempting to maintain early, on-time and late correlations of said input signal and the code corresponding to the particular multipath component. 45. The apparatus according lo claim 43, adapted to be implemented in an Application Specific Integrated Circuit (ASIC). 46. The apparatus according to claim 43, adapted to be implemented in a Field Programmable Gate Array (FPGA). 47. The apparatus according to claim 43, adapted to be implemented partially in hardware and partially in software. 48. The apparatus according to claim 43, wherein said set of first correlations are performed on hard-limited versions of said input signal. 49. The apparatus according to claim 43, wherein said number N is non-fixed. 50. The apparatus according to claim 43, wherein said plurality of N codes comprise any combination of diligent codes or same codes with different offsets. 51. The apparatus according to claim 43, wherein said spread spectrum communications system comprises a code division multiple access (CDMA) communication system. 52. A method of channel tap delay estimation of multipath components in an input signal (or use in a spread spectrum communications system, said method comprising the steps of: providing a correlation machine adapted In perform a plurality of correlations of an input signal and delayed version thereof and one or more codes; determining delays associated with said multipath components by configuring said correlation machine to perform a first set of correlations of said input signal and delayed versions thereof with a sum of a plurality of codes so as to generate indications of the presence of a multipath component at a particular delay having an ambiguous code associated therewith; resolving the ambiguity of the code associated with a multipath component by configuring said correlation machine to perform a second set of correlations of said input signal delayed in accordance with a determined multipath delay with each and every code in said plurality of codes, whereby correlations exceeding a threshold indicate the particular code associated with a multipath component; and tracking said multipath components by maintaining early, on-time and late correlations of said input signal with the code corresponding to the particular multipath component. 53. The method according to claim 52, adapted to be implemented in an Application Specific Integrated Circuit (ASIC). 54. The method according to claim 52, adapted to be implemented in a Field Programmable Gate Array (FPGA). 55. The method according to claim 52, adapted to be implemented partially in hardware and partially in software. 56. The method according to claim 52, wherein said set of first correlations are performed on hard-limited versions of said input signal. 57. The method according to claim 52, wherein said spread spectrum communications system comprises a code division multiple access (CDMA) communication system. 58. A rake receiver for use in a Code Division Multiple Access (CDMA) spread spectrum communications system, comprising: a radio frequency (RF) front end circuit for receiving a spread spectrum RF signal having a plurality of multipath components; a searcher adapted to estimate channel tap delays associated with the multipath components of said RF signal and to generate one or more path selections in accordance thereto, said searcher comprising means adapted to sum a plurality of N codes to generate a code sum therefrom, wherein N is a positive integer, determine the delay associated with one or more multipath components within said input signal by performing a first set of correlations of said code sum with said input signal and delayed versions thereof, determine the code associated with a multipath component by performing a second set of correlations of one or more delayed versions of said input signal with each of said N codes, wherein one or more said delayed versions of said input signal are selected in accordance with the results of said first set of correlations, declare the existence of a multipath component at a delay and code in accordance with the second correlation results; a finger bank for generating a plurality of demodulated signals from said RF signal in accordance with said path selections; a channel estimation unit adapted to generate channel estimates of one or more pilot signals; and a combiner coupled to the output of said collapsed finger bank and adapted to combine said demodulated signals output therefrom to generate a receive data output signal in accordance with said channel estimates. 59. The receiver according to claim 58, further comprising a channel decoder adapted to decode said receive data output signal and to generate a decoded output signal therefrom. 60. The receiver according to claim 58, Further comprising means for receiving and demodulating a plurality of physical channels concurrently. 61. The receiver according to claim 58, adapted to be implemented in an Application Specific Integrated Circuit (ASIC). 62. The receiver according to claim 58, adapted to be implemented in a Field Programmable Gate Array (FPGA). 63. The receiver according to claim 58, adapted to be implemented partially in hardware and partially in software. 64. The receiver according to claim 58, where said searcher is adapted to work during phase 1 correlation on hard-limited samples of said input signal. 65. The receiver according to claim 58, wherein said N codes represent codes in a frequency hopping spread spectrum communication system. 66. The receiver according to claim 58, wherein said plurality of N codes comprise any combination of different codes or same codes with different offsets.
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