초록 ▼

One embodiment of the invention relates to a microdevice package containing getters for maintaining a constant vacuum level within the sealed microdevice package. A stacked wafer assembly, containing a plurality of microdevice packages, is formed by aligning a bottom cover wafer with a center wafer.

One embodiment of the invention relates to a microdevice package containing getters for maintaining a constant vacuum level within the sealed microdevice package. A stacked wafer assembly, containing a plurality of microdevice packages, is formed by aligning a bottom cover wafer with a center wafer. The bottom cover wafer includes one or more bond pads to receive one or more getters. The center wafer includes one or more vias substantially aligned and corresponding to the one or more bond pads. One or more getters are inserted into the one or more vias. The stacked wafer assembly is completed by aligning a top cover wafer opposite the bottom cover wafer to sandwich the center wafer in between. A constant vacuum level is maintained inside the microdevice packages by aligning the wafers, activating the getters, and sealing the microdevice packages in a given sequence.

대표청구항 ▼

What is claimed is: 1. A method for fabricating a vacuum package comprising: arranging a bottom cover wafer under a center wafer, the bottom cover wafer including one or more bond pads to receive one or more getters, the center wafer including one or more vias substantially aligned and correspondin

What is claimed is: 1. A method for fabricating a vacuum package comprising: arranging a bottom cover wafer under a center wafer, the bottom cover wafer including one or more bond pads to receive one or more getters, the center wafer including one or more vias substantially aligned and corresponding to the one or more bond pads; inserting one or more getters into the one or more vias; and arranging a top cover wafer opposite the bottom cover wafer to sandwich the center wafer in between, the bottom cover wafer, the center wafer, and the top cover wafer forming a wafer stack assembly. 2. The method of claim 1 further comprising: aligning the bottom cover wafer and the center wafer prior to inserting the one or more getters into the one or more vias. 3. The method of claim 1 further comprising: aligning the bottom cover wafer and a top cover wafer after inserting the one or more getters into the one or more vias. 4. The method of claim 1 further comprising: bonding the bottom cover wafer to the center wafer prior to inserting the one or more getters into the one or more vias. 5. The method of claim 1 further comprising: placing the wafer stack assembly in a vacuum chamber for bonding and getter activation. 6. The method of claim 5 further comprising: purging the vacuum chamber of air and contaminants prior to heating the wafer stack assembly in a vacuum to a temperature sufficient to re-flow solder on the one or more bond pads. 7. The method of claim 5 further comprising: purging the vacuum chamber of air and contaminants prior to heating the getters to an activation temperature that is less than the solder re-flow temperature. 8. The method of claim 5 further comprising: inserting a non-gettable gas into the vacuum chamber prior to heating the getters to an activation temperature that is less than the solder re-flow temperature. 9. The method of claim 5 further comprising: pumping the vacuum chamber to achieve a desired vacuum level after the getters are heated to an activation temperature that is less than the solder re-flow temperature. 10. The method of claim 1 further comprising: heating the wafer stack assembly in a vacuum to a temperature sufficient to re-flow solder on one or more bond pads. 11. The method of claim 10 further comprising: cooling the wafer stack assembly to solidify the solder and secure the one or more getters to the corresponding bond pads. 12. The method of claim 11 further comprising: heating the getter to an activation temperature that is less than the solder re-flow temperature. 13. The method of claim 12 further comprising: bonding the bottom cover wafer, center wafer, and top cover wafer together in a vacuum. 14. The method of claim 12 further comprising: cooling the wafer stack assembly after the getters are heated to an activation temperature that is less than the solder re-flow temperature. 15. The method of claim 13 further comprising: annealing the wafer stack assembly to a desired anneal temperature to fully form covalent bonds between the bonded surfaces. 16. A method for fabricating a gyroscope microdevice chip comprising: aligning a bottom cover silicon wafer and a center silicon wafer, the bottom cover silicon wafer including one or more bond pads to receive one or more getters, the center silicon wafer including one or more vias aligned and corresponding to the one or more bond pads, the center silicon wafer also including a gyroscopic device; inserting one or more getters into the one or more vias; and aligning the bottom cover silicon wafer and a top cover silicon wafer, the bottom cover silicon wafer, center silicon wafer, and top cover silicon wafer forming a wafer stack assembly. 17. The method of claim 16 further comprising: heating the wafer stack assembly in a vacuum to a temperature sufficient to re-flow solder on one or more bond pads. 18. The method of claim 17 further comprising: heating the getter to an activation temperature that is less then the solder re-flow temperature. 19. The method of claim 18 further comprising: placing the wafer stack assembly in a vacuum chamber for bonding and getter activation; purging the vacuum chamber of air and contaminants prior to heating the wafer stack assembly in a vacuum to a temperature sufficient to re-flow solder on the one or more bond pads; purging the vacuum chamber of air and contaminants prior to heating the getters to the activation temperature that is less than the solder re-flow temperature; cooling the wafer stack assembly after the getters are heated to the activation temperature that is less than the solder re-flow temperature; and pumping the vacuum chamber to achieve a desired vacuum level after the getters are heated to the activation temperature that is less than the solder re-flow temperature. 20. The method of claim 19 further comprising: inserting a non-gettable gas into the vacuum chamber prior to heating the getters to an activation temperature that is less than the solder re-flow temperature. 21. The method of claim 19 further comprising: bonding the bottom cover wafer, center wafer, and top cover wafer together in a vacuum to form bonds between the bonded surfaces; and annealing the wafer stack assembly to a desired anneal temperature to fully form covalent bonds.