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Method and apparatus to eliminate processor core hot spots 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-009/46
  • G06F-015/00
  • G06F-011/00
  • G01K-015/00
  • H02H-005/04
  • H02H-005/00
  • G06F-013/24
  • G06F-013/20
출원번호 US-0163968 (2002-06-06)
발명자 / 주소
  • Luick,David Arnold
출원인 / 주소
  • International Business Machines Corporation
인용정보 피인용 횟수 : 38  인용 특허 : 25

초록

Methods and apparatus are provided for eliminating hot spots on processor chips in a symmetric multiprocessor (SMP) computer system. Some operations, in particular, floating point multiply/add, repetitively utilize portions of a processor chip to the point that the average power of the affected port

대표청구항

What is claimed is: 1. A symmetric multiprocessor computer system comprising: a plurality of processors; an operating system capable of switching and swapping tasks among the processors; a detector to detect occurrence of hot spots in the plurality of processors; wherein the operating system respon

이 특허에 인용된 특허 (25)

  1. Lenz Michael (Mnchen DEX), Circuit for temperature protection with hysteresis.
  2. Norman Robert D. ; Chevallier Christophe J., Clock signal from an adjustable oscillator for an integrated circuit.
  3. Clabes, Joachim Gerhard; Powell, Jr., Lawrence Joseph; Stasiak, Daniel Lawrence; Wang, Michael Fan, Computer chip heat responsive method and apparatus.
  4. Tang Jun ; So John Ling Wing, Computer operating process allocating tasks between first and second processors at run time based upon current processor load.
  5. Orenstien, Doron; Ronen, Ronny, Distribution of processing activity across processing hardware based on power consumption considerations.
  6. Kaminski, George A.; Squibb, George F., Dual control of fan speed-input corresponding to power supply temperature or software command from the processor corresponding to processor temperature.
  7. George A. Kaminski ; George F. Squibb, Dual power supply fan control-thermistor input or software command from the processor.
  8. Raz Yoav ; Scherr Allan L., Dynamic load balancing.
  9. Mark W. Peters ; Richard H. Hodge, Independently controlling passive and active cooling in a computer system.
  10. Nakagawa Toshikazu,JPX, Interrupt load distribution system for shared bus type multiprocessor system and interrupt load distribution method.
  11. Craft David J. (Austin TX), Method and apparatus for a thermal protection unit.
  12. Merkey, Jeffrey V., Method and apparatus for strong affinity multiprocessor scheduling.
  13. Thomas C. Douglas ; Thomas Alan E., Method and system for controlling a processor's clock frequency in accordance with the processor's temperature.
  14. Thomas C. Douglass ; Thomas Alan E., Method and system for performing thermal and power management for a computer.
  15. Boland Vernon K. ; Brasche Kevin R. ; Smith Kenneth A., Method for improving the execution efficiency of frequently communicating processes utilizing affinity process schedulin.
  16. Gunther, Stephen H.; Binns, Frank; Pippin, Jack D.; Rankin, Linda J.; Burton, Edward A.; Carmean, Douglas M.; Bauer, John M., Methods and apparatus for thermal management of an integrated circuit die.
  17. Golden, David; Donaldson, Darrel, Online control of a multiprocessor computer system.
  18. Lin Huo-Yuan,TWX, Over temperature protection method and device for a central processing unit.
  19. Georgiou Christos John ; Kirkpatrick Edward Scott ; Larsen Thor Arne, Performance-temperature optimization by cooperatively varying the voltage and frequency of a circuit.
  20. Johnson, Stephen B., Power monitoring and reduction for embedded IO processors.
  21. Enko Yutaka,JPX ; Arai Toshiaki,JPX ; Yamamoto Reki,JPX ; Shouji Naofumi,JPX ; Sekiguchi Tomoki,JPX ; Noda Tsutomu,JPX ; Watanabe Tsuyoshi,JPX ; Mochida Tetsuya,JPX, Process management method and system.
  22. Cai, Zhong-Ning George; Nakanishi, Tosaku, System to coordinate switching between first and second processors and to coordinate cache coherency between first and second processors during switching.
  23. Fung, Henry T., System, method, and architecture for dynamic server power management and dynamic workload management for multi-server environment.
  24. Kikinis Dan (Saratoga CA), Temperature management for integrated circuits.
  25. Barnes Cooper, Thermal control within systems having multiple CPU performance states.

이 특허를 인용한 특허 (38)

  1. Hady, Frank T.; Cabot, Mason B.; Beck, John; Rosenbluth, Mark B., Caching for heterogeneous processors.
  2. Hady, Frank T.; Cabot, Mason B.; Beck, John; Rosenbluth, Mark B., Caching for heterogeneous processors.
  3. Hady, Frank T.; Cabot, Mason B.; Beck, John; Rosenbluth, Mark B., Caching for heterogeneous processors.
  4. Hady, Frank T.; Cabot, Mason; Rosenbluth, Mark B.; Beck, John, Caching for heterogeneous processors.
  5. Campbell, Keith M.; Franke, Jeffery M; Whetzel, John K, Data center job migration and scheduling based on server chassis fan speed threshold.
  6. Singh, Deepak K., Data correction circuit.
  7. Bower, III, Fred A.; Elias, Deepak W.; Hegde, Nikhil; Heim, Jason M.; Kapoor, Sandhya; McKnight, Gregory J.; Morjan, Peter J.; Offer, Tony W., Data processing workload control.
  8. Johns, Charles R.; Riley, Mack W.; Shan, David W.; Wang, Michael F., Digital thermal sensor test implementation without using main core voltage supply.
  9. Kandasamy, Madhusudanan; Nataraj, Pruthvi P.; Vidya, Ranganathan, Domain based resource isolation in multi-core systems.
  10. Ahn, Min Seon; Yu, Ki Soo; Kim, Jae Choon; Oh, Chi Gwan; Yim, Myung Kyoon, Electronic systems including heterogeneous multi-core processors and methods of operating same.
  11. Singh, Deepak K.; Atallah, Francois Ibrahim; Allen, David Howard, Fan speed control from adaptive voltage supply.
  12. Singh, Deepak K.; Atallah, Francois Ibrahim; Allen, David Howard, Fan speed control from adaptive voltage supply.
  13. Singh, Deepak K.; Atallah, Francois Ibrahim; Allen, David Howard, Fan speed control from thermal diode measurement.
  14. Singh, Deepak K.; McCluskey, Scott Michael, Half width counting leading zero circuit.
  15. Mowry, Anthony C.; Farber, David G.; Austin, Michael J.; Moore, John E., Heat management using power management information.
  16. Hady, Frank T.; Cabot, Mason B.; Beck, John; Rosenbluth, Mark B., Heterogeneous processors sharing a common cache.
  17. Hady, Frank T.; Cabot, Mason B.; Beck, John; Rosenbluth, Mark B., Heterogeneous processors sharing a common cache.
  18. Gunther, Stephen H.; Jourdan, Stephan; Greiner, Robert; Burton, Edward A.; Deval, Anant S.; Cornaby, Michael; Shrall, Jeremy; Ramadorai, Ray, Integrated circuit performance improvement across a range of operating conditions and physical constraints.
  19. Carlson, David A.; Kessler, Richard E.; Haider, Amer, Method and apparatus for estimating overshoot power after estimating power of executing events.
  20. Ha, Min Hoon, Method and apparatus for implementing a hybrid power management mode for a computer with a multi-core processor.
  21. Carlson, David A.; Kessler, Richard E., Method and apparatus for managing global chip power on a multicore system on chip.
  22. Carlson, David A.; Kessler, Richard E., Method and apparatus for managing global chip power on a multicore system on chip.
  23. Carlson, David A.; Kessler, Richard E., Method and apparatus for power control.
  24. Carlson, David A.; Kessler, Richard E., Method and apparatus for power control.
  25. Bose, Pradip; Cher, Chen-Yong; Franke, Hubertus; Hamann, Hendrik; Kursun, Eren; Weger, Alan J., Method of virtualization and OS-level thermal management and multithreaded processor with virtualization and OS-level thermal management.
  26. Suzuoki,Masakazu, Multiprocessor system for decrypting and resuming execution of an executing program after transferring the program code between two processors via a shared main memory upon occurrence of predetermined condition.
  27. Singh, Deepak K.; Atallah, Francois Ibrahim; Seman, David John, On-chip frequency response measurement.
  28. Chakraborty, Koushik; Wells, Philip M.; Sohi, Gurindar S., Over-provisioned multicore processor.
  29. Jin, Lei; Sip, Kim-Yeung, Processing system and electronic device with same.
  30. Catalano, Pasquale A.; DeCusatis, Casimer M.; Krishnamurthy, Rajaram B; Onghena, Michael; Rao, Anuradha, Reconfigurable backup and caching devices.
  31. Van Der Veen, Peter, Symmetric multi-processor system.
  32. Koo, Yong Bon; Seo, Young Bin; Kim, Jeong Ki; Kim, Jae Myoung; Park, Seung Min, System and method of task assignment distributed processing system.
  33. Czarnecki, Stanley W.; Iben, Icko E. T., Systems and methods using diodes to protect electronic devices.
  34. Singh, Deepak K.; Atallah, Francois Ibrahim, Temperature dependent voltage source compensation.
  35. Johns, Charles Ray; Wang, Michael Fan, Tracing thermal data via performance monitoring.
  36. Singh, Deepak K.; Atallah, Francois Ibrahim, Using IR drop data for instruction thread direction.
  37. Singh, Deepak K.; Atallah, Francois Ibrahim, Using performance data for instruction thread direction.
  38. Singh, Deepak K.; Atallah, Francois Ibrahim, Using temperature data for instruction thread direction.
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