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Method and apparatus for operating a transceiver in different data rates

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H04B-001/38
  • G06F-013/38
출원번호 US-0090251 (2002-03-01)
발명자 / 주소
  • Cory,Warren E.
출원인 / 주소
  • Xilinx, Inc.
인용정보 피인용 횟수 : 6  인용 특허 : 83

초록

A transceiver can be used to send and receive data at a lower data rate than the data rate its SERDES is designed to operate. It contains a transmitter interface that receives a first set of data at a lower data rate and delivers a second set of data to the SERDES at a higher data rate. The transcei

대표청구항

The invention claimed is: 1. A transceiver connected to a data source and a data receiver, comprising: an input port for accepting a control signal having a first and a second state; a serializer designed to operate at a first data rate; and a first interface that receives a first set of data from

이 특허에 인용된 특허 (83)

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이 특허를 인용한 특허 (6)

  1. Kryzak,Joseph Neil; Hoelscher,Aaron J.; Rock,Thomas E., Channel bonding of a plurality of multi-gigabit transceivers.
  2. Vogel,Danny; Shaw,Carl, Customizable development and demonstration platform for structured ASICs.
  3. Venkata, Ramanand; Lee, Chong H., Digital phase locked loop circuitry and methods.
  4. Gorbics,Mark S., Fractional-decimation signal processing.
  5. Groen, Eric D.; Boecker, Charles W.; Black, William C.; Irwin, Scott A.; Kryzak, Joseph Neil, MGT/FPGA clock management system.
  6. Cole, Christopher R., Serializer/deserializers for use in optoelectronic devices.
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