IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0067481
(2002-02-05)
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우선권정보 |
JP-2001-035257(2001-02-13) |
발명자
/ 주소 |
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
5 인용 특허 :
7 |
초록
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A bus arbitration apparatus includes a storage, a priority order determiner, and an arbitrator. The storage stores a plurality of selection signals for specifying a priority order against a number N of requests. The priority order determiner causes the storage to output one of the plurality of selec
A bus arbitration apparatus includes a storage, a priority order determiner, and an arbitrator. The storage stores a plurality of selection signals for specifying a priority order against a number N of requests. The priority order determiner causes the storage to output one of the plurality of selection signals in a predetermined sequence in response to a demand for arbitration. The arbitrator performs an arbitration operation based on the priority order against the number N of requests specified by one of the plurality of selection signals which is output from the storage.
대표청구항
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What is claimed is: 1. A bus arbitration apparatus, comprising: a storage arranged and configured to store a plurality of selection signals for specifying a priority order against a number N of requests for use of a bus; a priority order determiner arranged and configured to cause said storage to o
What is claimed is: 1. A bus arbitration apparatus, comprising: a storage arranged and configured to store a plurality of selection signals for specifying a priority order against a number N of requests for use of a bus; a priority order determiner arranged and configured to cause said storage to output one of said plurality of selection signals in a predetermined sequence in response to a demand for arbitration; and an arbitrator arranged and configured to perform an arbitration operation based on said priority order against said number N of requests specified by said one of said plurality of selection signals which is output from said storage, wherein the selection signal output from said storage places the requests in a corresponding order of decreasing priority. 2. A bus arbitration apparatus as defined in claim 1, wherein said storage stores a number N or more of said selection signals for differently specifying said priority order against said number N of requests. 3. A bus arbitration apparatus as defined in claim 1, wherein said storage is a re-programmable storage. 4. A bus arbitration apparatus as defined in claim 3, wherein said storage comprises: a plurality of re-programmable registers for storing said plurality of selection signals; and an output circuit arranged and configured to output a selection signal stored in a register specified among said plurality of re-programmable registers, and wherein said priority order determiner in turn specifies one of said plurality of re-programmable registers included in said storage in response to each of said demand for arbitration. 5. A bus arbitration apparatus as defined in claim 1, wherein said priority order determiner specifies selection signals to be in turn selected in response to said demand for arbitration, out of said plurality of selection signals stored in said storage. 6. A bus arbitration apparatus as defined in claim 5, wherein said priority order determiner comprises: a counter arranged and configured to increment said counter by 1 and to output a counting value to said storage in response to said demand for arbitration; and a counter resetter arranged and configured to reset said counter when said counting value counted by said counter matches an upper limit value which is externally re-programmable, and wherein said storage outputs one of said plurality of selection signals specified by said counting value output from said counter of said priority order determiner. 7. A bus arbitration apparatus as defined in claim 3, wherein said storage comprises a plurality of re-programmable registers sequentially connected to form a shift register that shifts data stored therein in response to a signal generated in accordance with said demand for arbitration and that outputs data stored in a last-positioned register of said plurality of re-programmable registers as one of said plurality of selection signals. 8. A bus arbitration apparatus as defined in claim 1, wherein said priority order determiner causes said storage to output one of said plurality of selection signals in a predetermined sequence in response to a demand for arbitration after a request from a requester having a highest priority is permitted by said arbitrator. 9. A bus arbitration apparatus as defined in claim 1, wherein said storage stores said plurality of selection signals each including a mode setting signal for setting an operation mode to a first operation mode in which said priority order is changed in accordance with each demand for arbitration or to a second operation mode in which said priority order is changed in response to said demand for arbitration made after a presently highest priority requester raises a request and is permitted, and said apparatus further comprising a gate circuit arranged and configured to pass said demand for arbitration to said priority order determiner when said mode setting signal output together with said selection signal from said storage sets said first operation mode and to pass said demand for arbitration to said priority order determiner after said request raised by said presently highest priority requester is permitted when said mode setting signal sets said second operation mode. 10. A bus arbitration apparatus, comprising: storing means for storing a plurality of selection signals for specifying a priority order against a number N of requests for use of a bus; determining means for causing said storing means to output one of said plurality of selection signals in a predetermined sequence in response to a demand for arbitration; and arbitrating means for performing an arbitration operation based on said priority order against said number N of requests specified by said one of said plurality of selection signals which is output from said storing means, wherein the selection signal output from said storing means places the requests in a corresponding order of decreasing priority. 11. A bus arbitration apparatus as defined in claim 10, wherein said storing means stores a number N or more of said selection signals for differently specifying said priority order against said number N of requests. 12. A bus arbitration apparatus as defined in claim 10, wherein said storing means is a re-programmable storage. 13. A bus arbitration apparatus as defined in claim 12, wherein said storing means comprises: re-programmable registering means for registering said plurality of selection signals; outputting means for outputting a selection signal stored in a portion specified in said re-programmable registering means, and wherein said determining means in turn specify a portion in said re-programmable registering means included in said storing means in response to each of said demand for arbitration. 14. A bus arbitration apparatus as defined in claim 10, wherein said determining means specifies selection signals to be in turn selected in response to said demand for arbitration, out of said plurality of selection signals stored in said storing means. 15. A bus arbitration apparatus as defined in claim 14, wherein said determining means comprises: counting means for outputting a counting value to said storing means in response to said demand for arbitration, to increment said counting means by 1; and resetting means for resetting said counting means when said counting value counted by said counting means matches an upper limit value which is externally re-programmable, and wherein said storing means outputs one of said plurality of selection signals specified by said counting value output from said counting means of said determining means. 16. A bus arbitration apparatus as defined in claim 12, wherein said storing means comprises re-programmable registering means forming a shift register that shifts data stored therein in response to a signal generated in accordance with said demand for arbitration and that outputs data stored in a portion of said re-programmable registering means as one of said plurality of selection signals. 17. A bus arbitration apparatus as defined in claim 10, wherein said determining means causes said storing means to output one of said plurality of selection signals in a predetermined sequence in response to a demand for arbitration after a request from a requester having a highest priority is permitted by said arbitrating means. 18. A bus arbitration apparatus as defined in claim 10, wherein said storing means stores said plurality of selection signals each including a mode setting signal for setting an operation mode to a first operation mode in which said priority order is changed in accordance with each demand for arbitration or to a second operation mode in which said priority order is changed in response to a demand for arbitration made after a presently highest priority requester raises a request and is permitted, and said apparatus further comprising gating means for passing said demand for arbitration to said determining means when said mode setting signal output together with said selection signal from said storing means sets said first operation mode and passing said demand for arbitration to said determining means after said request raised by said presently highest priority requester is permitted when said mode setting signal sets said second operation mode. 19. A method of bus arbitration, comprising the steps of: storing a plurality of selection signals for specifying a priority order against a number N of requests for use of a bus; selecting one of said plurality of selection signals in a predetermined sequence in response to each demand for arbitration; and performing an arbitration operation based on said priority order against said number N of requests specified by said one of said plurality of selection signals which is selected in said selecting steps, wherein the selected selection signal places the requests in a corresponding order of decreasing priority. 20. A method as defined in claim 19, wherein said storing step stores a number N or more of said selection signals for differently specifying said priority order against said number N of requests. 21. A method as defined in claim 19, wherein said storing step stores said plurality of selection signals into a re-programmable storage. 22. A method as defined in claim 21, wherein said storing step stores said plurality of selection signals in a ring form and said selecting step in turn selects a portion of said ring form and outputs a selection signal stored in said selected portion of said ring form in response to each demand for arbitration. 23. A method as defined in claim 19, wherein said selecting step selects selection signals to be in turn selected in response to each demand for arbitration, out of said plurality of selection signals stored in said storing step. 24. A method as defined in claim 23, wherein said selecting step comprises the steps of: counting a number by incrementing by 1 for each demand for arbitration; and resetting said counting step when said number counted in said counting step matches an upper limit number which is externally re-programmable, and wherein said selecting step specifies one of said plurality of selection signals based on said number counted in said counting step. 25. A method as defined in claim 21, wherein said storing step stores said plurality of selection signals into a re-programmable shift register that shifts data stored therein in response to a signal generated in accordance with a demand for arbitration and that outputs data stored in a portion thereof as one of said plurality of selection signals. 26. A method as defined in claim 19, wherein said selecting step in turn selects said one of said plurality of selection signals in said predetermined sequence in response to each demand for arbitration after a request from requester having a highest priority is permitted in said arbitrating step. 27. A method as defined in claim 19, wherein said storing step stores said plurality of selection signals each including a mode setting signal for setting an operation mode to a first operation mode in which said priority order is changed in accordance with each demand for arbitration or to a second operation mode in which said priority order is changed in response to said demand for arbitration made after a presently highest priority requester raises a request and is permitted, and said method further comprising the steps of gating said determining step with said demand for arbitration when said mode setting signal output together with said selection signal sets said first operation mode and gating said determining step with said demand for arbitration after said request raised by said presently highest priority requester is permitted when said mode setting signal sets said second operation mode. 28. A method of bus arbitration comprising: storing a plurality of selection signals each designating a respective priority order for requests for bus access; providing said selection signals in a predetermined sequence, each selection signal being provided in response to a respective demand for arbitration between said requests for bus access, and the sequence in which the selection signals are provided designating a sequence of priority orders that are not fixed and differ from a round robin priority sequence; and arbitrating access to the bus for said requests for bus access in response to each demand for arbitration in accordance with the respective selection signal provided in response to the demand for arbitration, wherein the selection signal places the requests in a corresponding order of decreasing priority. 29. A system for bus arbitration for requests for bus access comprising: a memory arrangement storing selection signals each designating a respective different priority order for requests for bus access; a source of demands for arbitration; a selection signal providing arrangement coupled with the memory arrangement and the source of demands for arbitration, and responsive to demands for arbitration from said source to provide respective selection signals from said memory arrangement, wherein the selection signals in said sequence designate non-fixed priority orders that differ from a round robin priority sequence, wherein each selection signal output from said memory arrangement places the requests for bus access in a corresponding order of decreasing priority; and an arbitrating arrangement responsive to the selection signals provided from said memory arrangement by said selection signal providing arrangement to arbitrate an order of bus access for said requests. 30. The bus arbitration apparatus of claim 1, wherein said bus arbitration apparatus receives the N requests for use of the bus from N respective bus use requestors, and outputs an activated bus use permission signal to one of the N respective bus use requestors, based on the arbitration operation by the arbitrator, and wherein said priority order determiner causes another one of the plurality of selection signals to be output from said storage after the activated bus use permission signal is output to the one of the N respective bus use requestors.
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