Precision tunable voltage controlled oscillation and applications thereof
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H03B-005/12
H03B-005/08
H03L-007/099
H03L-007/08
H04B-007/00
출원번호
US-0836876
(2004-04-30)
발명자
/ 주소
Anand,Seema B.
출원인 / 주소
Broadcom Corporation
대리인 / 주소
Garlick Harrison &
인용정보
피인용 횟수 :
5인용 특허 :
1
초록▼
A precision tunable VCO includes a bias transistor, a first inductor, a second inductor, a first input transistor, a second input transistor, a first capacitor, a second capacitor, a first precision tune capacitor circuit, and a second precision tune capacitor circuit. The bias transistor, the first
A precision tunable VCO includes a bias transistor, a first inductor, a second inductor, a first input transistor, a second input transistor, a first capacitor, a second capacitor, a first precision tune capacitor circuit, and a second precision tune capacitor circuit. The bias transistor, the first and second inductors, the first and second input transistors, and the first and second capacitors are operably coupled to produce a differential output oscillation. The first precision tune capacitor circuit is operably coupled to the first leg of the differential output oscillation, wherein the first precision tune capacitor circuit provides a first precision capacitance value based on a calibration signal. The second precision tune capacitor circuit is operably coupled to the second leg of the differential output oscillation, wherein the second precision tune capacitor circuit provides a second precision capacitance value based on the calibration signal, wherein the control voltage, the first precision capacitance value, the second precision capacitance value, the first capacitor, the second capacitor, the first inductor, and the second inductor establish frequency of the differential output oscillation.
대표청구항▼
What is claimed is: 1. A precision tunable voltage controlled oscillator (VCO) comprises: a bias transistor having a gate, a drain, and a source, wherein the gate of the bias transistor is operably coupled to a bias voltage and the source of the bias transistor is operably coupled to a power supply
What is claimed is: 1. A precision tunable voltage controlled oscillator (VCO) comprises: a bias transistor having a gate, a drain, and a source, wherein the gate of the bias transistor is operably coupled to a bias voltage and the source of the bias transistor is operably coupled to a power supply source; a first inductor having a first node and a second node, wherein the first node of the first inductor is operably coupled to the drain of the bias transistor; a second inductor having a first node and a second node, wherein the first node of the second inductor is operably coupled to the drain of the bias transistor; a first input transistor having a gate, a drain, and a source, wherein the drain of the first input transistor is operably coupled to the second node of the first inductor to provide a first leg of a differential output oscillation of the precision tunable VCO; a second input transistor having a gate, a drain, and a source, wherein the drain of the second input transistor is operably coupled to the second node of the second inductor to provide a second leg of the differential output oscillation, wherein the source of the first input transistor is operably coupled to the source of the second input transistor and to ground, wherein the gate of the second transistor is operably coupled to the first leg of the differential output oscillation and the gate of the first transistor is operably coupled to the second leg of the differential output oscillation; a first capacitor having a first node and a second node, wherein the first node of the first capacitor is operably coupled to receive a control voltage and the second node of the first capacitor is operably coupled to the first leg of the differential output oscillation; a second capacitor having a first node and a second node, wherein the first node of the second capacitor is operably coupled to receive the control voltage and the second node of the second capacitor is operably coupled to the second leg of the differential output oscillation; a first precision tune capacitor circuit operably coupled to the first leg of the differential output oscillation, wherein the first precision tune capacitor circuit provides a first precision capacitance value based on a calibration signal, in which a range of the first precision capacitance value selected is to maintain a precision tuning range of approximately 0.5%; and a second precision tune capacitor circuit operably coupled to the second leg of the differential output oscillation, wherein the second precision tune capacitor circuit provides a second precision capacitance value based on the calibration signal, in which a range of the second precision capacitance value selected is to maintain a precision tuning range of approximately 0.5%, wherein the control voltage, the first precision capacitance value, the second precision capacitance value, the first capacitor, the second capacitor, the first inductor, and the second inductor establish frequency of the differential output oscillation. 2. The precision tunable VCO of claim 1, wherein each of the first and second capacitors comprises: a variable capacitance circuit, wherein a capacitance value of the variable capacitance circuit is at least partially established based on a channel select signal. 3. The precision tunable VCO of claim 2, wherein the variable capacitance circuit comprises a varactor. 4. The precision tunable VCO of claim 1, wherein each of the first and second precision tune capacitor circuits comprises: a plurality of capacitor cells operably coupled in parallel and individually enabled; and a digital controller operably coupled to convert the calibration signal into individual enable signals for individual ones of the plurality of capacitor cells. 5. The precision tunable VCO of claim 4, wherein each of the plurality of capacitor cells comprises: a capacitor having a first node and a second node; and a transistor having a gate, a drain, and a source, wherein the second node of the capacitor is coupled to the drain of the transistor, wherein the gate of the transistor is operably coupled to receive one of the individual enable signals, and wherein the first node of the capacitor and the source of the transistor provide connections for the capacitor cell. 6. The precision tunable VCO of claim 4, wherein the digital controller comprises a thermometer coder. 7. The precision tunable VCO of claim 1 further comprises: a high frequency ground circuit to provide the operable coupling between ground and the sources of the first and second input transistors. 8. A phase locked loop comprises: a phase detector operably coupled to produce a difference signal based on a phase difference between a reference oscillation and a feedback oscillation; a charge pump operably coupled to convert the difference signal into current sink signal or a current source signal; a loop filter operably coupled to convert the current sink signal and the current source signal into a control voltage; a precision voltage controlled oscillator operably coupled to produce a differential output oscillation based on the control voltage and a VCO calibration signal; a mixer operably coupled to mix the differential output oscillation with a local oscillation to produce a mixed oscillation; a low pass filter operably coupled to filter the mixed oscillation to produce the feedback oscillation; and a calibration module operably coupled to produce the VCO calibration signal based on a calibration of the RF transmitter, wherein the precision voltage controlled oscillator includes: a bias transistor having a gate, a drain, and a source, wherein the gate of the bias transistor is operably coupled to a bias voltage and the source of the bias transistor is operably coupled to a power supply source; a first inductor having a first node and a second node, wherein the first node of the first inductor is operably coupled to the drain of the bias transistor; a second inductor having a first node and a second node, wherein the first node of the second inductor is operably coupled to the drain of the bias transistor; a first input transistor having a gate, a drain, and a source, wherein the drain of the first input transistor is operably coupled to the second node of the first inductor to provide a first leg of the differential output oscillation; a second input transistor having a gate, a drain, and a source, wherein the drain of the second input transistor is operably coupled to the second node of the second inductor to provide a second leg of the differential output oscillation, wherein the source of the first input transistor is operably coupled to the source of the second input transistor and to ground, wherein the gate of the second transistor is operably coupled to the first leg of the differential output oscillation and the gate of the first transistor is operably coupled to the second leg of the differential output oscillation; a first capacitor having a first node and a second node, wherein the first node of the first capacitor is operably coupled to receive a control voltage and the second node of the first capacitor is operably coupled to the first leg of the differential output oscillation; a second capacitor having a first node and a second node, wherein the first node of the second capacitor is operably coupled to receive the control voltage and the second node of the second capacitor is operably coupled to the second leg of the differential output oscillation; a first precision tune capacitor circuit operably coupled to the first leg of the differential RF output oscillation, wherein the first precision tune capacitor circuit provides a first precision capacitance value based on a calibration signal, in which a range of the first precision capacitance value selected is to maintain a precision tuning range of approximately 0.5%; and a second precision tune capacitor circuit operably coupled to the second leg of the differential RF output oscillation, wherein the second precision tune capacitor circuit provides a second precision capacitance value based on the calibration signal, in which a range of the second precision capacitance value selected is to maintain a precision tuning range of approximately 0.5%, wherein the control voltage, the first precision capacitance value, the second precision capacitance value, the first capacitor, the second capacitor, the first inductor, and the second inductor establish frequency of the differential RF output oscillation. 9. The phase locked loop of claim 8, wherein each of the first and second capacitors comprises: a variable capacitance circuit, wherein a capacitance value of the variable capacitance circuit is at least partially established based on a channel select signal. 10. The phase locked loop of claim 9, wherein the variable capacitance circuit comprises a varactor. 11. The phase locked loop of claim 8, wherein each of the first and second precision tune capacitor circuits comprises: a plurality of capacitor cells operably coupled in parallel and individually enabled; and a digital controller operably coupled to convert the calibration signal into individual enable signals for individual ones of the plurality of capacitor cells. 12. The phase locked loop of claim 11, wherein each of the plurality of capacitor cells comprises: a capacitor having a first node and a second node; and a transistor having a gate, a drain, and a source, wherein the second node of the capacitor is coupled to the drain of the transistor, wherein the gate of the transistor is operably coupled to receive one of the individual enable signals, and wherein the first node of the capacitor and the source of the transistor provide connections for the capacitor cell. 13. The phase locked loop of claim 11, wherein the digital controller comprises a thermometer coder. 14. The phase locked loop of claim 8 further comprises: a high frequency ground circuit to provide the operable coupling between ground and the sources of the first and second input transistors. 15. A radio frequency (RE) transmitter comprises: a phase detector operably coupled to produce a difference signal based on a phase difference between a modulated input oscillation and a feedback oscillation; a charge pump operably coupled to convert the difference signal into current sink signal or a current source signal; a loop filter operably coupled to convert the current sink signal and the current source signal into a control voltage; a precision voltage controlled oscillator operably coupled to produce a differential RF output oscillation based on the control voltage and a VCO calibration signal; a mixer operably coupled to mix the differential RE output oscillation with a local oscillation to produce a mixed oscillation; a low pass filter operably coupled to filter the mixed oscillation to produce the feedback oscillation; and a calibration module operably coupled to produce the VCO calibration signal based on a calibration of the phase locked loop, wherein the precision voltage controlled oscillator includes: a bias transistor having a gate, a drain, and a source, wherein the gate of the bias transistor is operably coupled to a bias voltage and the source of the bias transistor is operably coupled to a power supply source; a first inductor having a first node and a second node, wherein the first node of the first inductor is operably coupled to the drain of the bias transistor; a second inductor having a first node and a second node, wherein the first node of the second inductor is operably coupled to the drain of the bias transistor; a first input transistor having a gate, a drain, and a source, wherein the drain of the first input transistor is operably coupled to the second node of the first inductor to provide a first leg of a differential RF output oscillation; a second input transistor having a gate, a drain, and a source, wherein the drain of the second input transistor is operably coupled to the second node of the second inductor to provide a second leg of the differential RF output oscillation, wherein the source of the first input transistor is operably coupled to the source of the second input transistor and to ground, wherein the gate of the second transistor is operably coupled to the first leg of the differential RF output oscillation and the gate of the first transistor is operably coupled to the second leg of the differential RF output oscillation; a first capacitor having a first node and a second node, wherein the first node of the first capacitor is operably coupled to receive a control voltage and the second node of the first capacitor is operably coupled to the first leg of the differential RF output oscillation; a second capacitor having a first node and a second node, wherein the first node of the second capacitor is operably coupled to receive the control voltage and the second node of the second capacitor is operably coupled to the second leg of the differential RF output oscillation; a first precision tune capacitor circuit operably coupled to the first leg of the differential output oscillation, wherein the first precision tune capacitor circuit provides a first precision capacitance value based on a calibration signal in which a range of the first precision capacitance value selected is to maintain a precision tuning range of approximately 0.5%; and a second precision tune capacitor circuit operably coupled to the second leg of the differential output oscillation, wherein the second precision tune capacitor circuit provides a second precision capacitance value based on the calibration signal, in which a range of the second precision capacitance value selected is to maintain a precision tuning range of approximately 0.5%, wherein the control voltage, the first precision capacitance value, the second precision capacitance value, the first capacitor, the second capacitor, the first inductor, and the second inductor establish frequency of the differential RF output oscillation. 16. The RF transmitter of claim 15, wherein each of the first and second capacitors comprises: a variable capacitance circuit, wherein a capacitance value of the variable capacitance circuit is at least partially established based on a channel select signal. 17. The RF transmitter of claim 16, wherein the variable capacitance circuit comprises a varactor. 18. The RF transmitter of claim 15, wherein each of the first and second precision tune capacitor circuits comprises: a plurality of capacitor cells operably coupled in parallel and individually enabled; and a digital controller operably coupled to convert the calibration signal into individual enable signals for individual ones of the plurality of capacitor cells. 19. The RF transmitter of claim 18, wherein each of the plurality of capacitor cells comprises: a capacitor having a first node and a second node; and a transistor having a gate, a drain, and a source, wherein the second node of the capacitor is coupled to the drain of the transistor, wherein the gate of the transistor is operably coupled to receive one of the individual enable signals, and wherein the first node of the capacitor and the source of the transistor provide connections for the capacitor cell. 20. The RF transmitter of claim 18, wherein the digital controller comprises a thermometer coder. 21. The RF transmitter of claim 15 further comprises: a high frequency ground circuit to provide the operable coupling between ground and the sources of the first and second input transistors.
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이 특허에 인용된 특허 (1)
Ralph Duncan ; Tom W. Kwan, System and method for narrow band PLL tuning.
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