$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Method and apparatus for optimizing performance and battery life of electronic devices based on system and application parameters 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-001/32
출원번호 US-0268914 (2002-10-11)
발명자 / 주소
  • Girson,Andrew
  • Donskoy,Boris
  • Tennies,Nathan
출원인 / 주소
  • In Hand Electronics, Inc.
대리인 / 주소
    Edell, Shapiro &
인용정보 피인용 횟수 : 213  인용 특허 : 101

초록

An electronic device (e.g., computer system, etc.) employing dynamic power management of the present invention adjusts power consumption in accordance with an analysis of parameters and events occurring over one or more time-periods. Preferably, the electronic device monitors microprocessor, operat

대표청구항

What is claimed is: 1. A system for dynamically managing power within an electronic device comprising: a power management device including: a sampling module to ascertain and store a plurality of parameter values associated with said electronic device during at least one sampling interval; an analy

이 특허에 인용된 특허 (101)

  1. Sakai Makoto,JPX, ACPI sleep control.
  2. Fung Henry Tat-Sang, Activity monitor for computer system power management.
  3. Bajorek Christopher H. (Los Gatos CA) Glaser Thomas W. (Rochester MN) Klaassen Klaas B. (San Jose CA) Nielsen Charles R. (San Jose CA) Santana George R. (Saratoga CA) Smith Gordon J. (Rochester MN) T, Adaptive system for optimizing disk drive power consumption.
  4. Nicol Christopher John,AUX, Apparatus and method for adaptive reduction of power consumption in integrated circuits.
  5. Shaffer Shmuel ; Beyda William J. ; Gold Cheryl, Apparatus and method for automatic CPU speed control based on application-specific criteria.
  6. Seo Seung-Won,KRX, Apparatus and method for displaying PMS information in a portable computer.
  7. DeSchepper Todd J. ; Reif James R. ; Edwards James R. ; Collins Michael J. ; Larson John E., Apparatus and method for entering low power mode in a computer system.
  8. Atkinson Lee W. (Houston TX), Apparatus for reducing computer system power consumption.
  9. Maitra Amit K. (Hillsboro OR), Application specific clock throttling.
  10. Seibert Mark H. (Cupertino CA) Wallgren Markus C. (Palo Alto CA), Arrangement for reducing computer power consumption by turning off the microprocessor when inactive.
  11. Canova ; Jr. Francis J. (Boynton Beach FL) Katz Neil A. (Parkland FL) Pollitt Richard F. (Jensen Beach FL) Suarez Leopoldo L. (Boca Raton FL) Astarabadi Shaun (Irvine CA) Frank C. William (Irvine CA), Battery operated computer power management system.
  12. Hoshina Masahiro (Yokohama JPX), Battery powered information terminal apparatus wherein the clock frequency is switched dependent upon the battery voltag.
  13. Bland Patrick M. (Delray Beach FL) Jackson Robert T. (Boyhton Beach FL) Joshi Jayesh (Santa Clara CA) Kardach James (San Jose CA), CPU clock control unit.
  14. Jackson Robert T. ; Nachtsheim Stephen P. ; Ma Taufik T., Circuit and method for controlling power and performance based on operating environment.
  15. Tsunoda Takashi (Tokyo JPX), Circuitry for reducing power dissipation in equipment which operates in synchronism with clock pulses.
  16. Fung Henry Tat-Sang, Computer activity monitor providing idle thread and other event sensitive clock and power control.
  17. Sun Jiming, Computer power management.
  18. Walsh James J. ; Kau Weiyuen, Computer system power management interconnection circuitry, systems and methods.
  19. Inoue Tadanobu,JPX ; Sekiya Kazuo,JPX, Computer system, device and operation frequency control method.
  20. Gettel Steven K. (Austin TX), Computer with transparent power-saving manipulation of CPU clock.
  21. Hillion Herv (Eindhoven NLX), Data processing apparatus with energy saving clocking device.
  22. Hetzler Steven Robert (Sunnyvale CA), Disk drive for portable computer with adaptive demand-driven power management.
  23. Zenda Hiroki (Tokyo JPX), Display control apparatus capable of changing luminance depending on conditions of power supply circuit.
  24. Zenda Hiroki (Tokyo JPX), Display control apparatus capable of changing luminance depending on conditions of power supply circuit.
  25. Hlasny Daryl James, Dual clock power conservation system and method for timing synchronous communications.
  26. Sheets Laurence L. (St. Charles IL), Electrical system having variable-frequency clock.
  27. Burch Kenneth R. (Austin TX), Emulation system and method for development of a low power data processor.
  28. Heinz Michael E. (Munich DEX) Theres Heinz P. (Munich DEX), Energy saving cardiac pacemaker.
  29. Jirgal James J., Event driven power management control circuit and method therefor.
  30. Suzuki Naoshi (Kanagawa JPX) Uno Shunya (Machida JPX), Information processing system having power saving control of the processor clock.
  31. Raasch Charles F. (El Toro CA) Kim Jason S. M. (Los Angeles CA), Internal interrupt controller for a peripheral controller.
  32. Noguchi Kouki (Tokyo JPX) Nishioka Kiyokazu (Odawara JPX) Ohba Shinya (Shiroyama-machi JPX) Narita Susumu (Kokubunji JPX), Logic LSI.
  33. Sakabe Tetsuya (Higashine JPX), Memory apparatus.
  34. Longini Richard L. (Mars PA), Method and apparatus for calibrating a digital electric engergy consumption meter.
  35. Horigan John W. ; Peairs Rex C., Method and apparatus for control of the rate of change of current consumption of an electronic component.
  36. Seyfollah Bazarjani ; Sean Wang ; Vincenzo Peluso, Method and apparatus for controlling stages of a multi-stage circuit.
  37. Young Bruce, Method and apparatus for dynamically adjusting the clock speed of a bus depending on bus activity.
  38. Gunther Stephen H. ; Domen Stanley J. ; Idate Dileep R., Method and apparatus for dynamically adjusting the power consumption of a circuit block within an integrated circuit.
  39. Chu Michael C. K. (Kolwoon HKX) Yiu Hing Leung (Tsuen Wan HKX), Method and apparatus for providing only that number of clock pulses necessary to complete a task.
  40. Watts Vaughn, Method and apparatus for real-time CPU thermal management and power conservation by adjusting CPU clock frequency in acc.
  41. Narad Charles E. (Santa Clara CA) Ebrahim Zahir (Mountain View CA) Nishtala Satyanarayana (Cupertino CA) Van Loo William C. (Palo Alto CA) Normoyle Kevin B. (San Jose CA) Coffin ; III Louis F. (San J, Method and apparatus for reducing power consumption in a computer network without sacrificing performance.
  42. Simmons Laura E. (Tempe AZ) Jayavant Rajeev (Phoenix AZ), Method and apparatus for reducing power consumption in digital electronic circuits.
  43. Ralph M. Kling ; Edward T. Grochowski, Method and apparatus of measuring current, voltage, or duty cycle of a power supply to manage power consumption in a computer system.
  44. Knyazhitsky Vladimir RU, Method and apparatus utilized in computer type systems for control of variable speed fans to reduce their noise.
  45. Thomas C. Douglas ; Thomas Alan E., Method and system for controlling a processor's clock frequency in accordance with the processor's temperature.
  46. Garcia-Duarte Fernando (Redmond WA) Hensley John (Redmond WA) Mohanraj Shanmugam (Redmond WA) Subramaniyan Nagarajan (Redmond WA) Olsson David B. (Seattle WA), Method and system for placing a computer in a reduced power state.
  47. Swanberg Randal Craig, Method and system in a data processing system for interfacing an operating system with a power management controller..
  48. Hall Scott M. (Fort Worth TX), Method for compensating for capacity overload in a spread spectrum communication system.
  49. Skurnik David ; Mawet Patrick H ; Andermo Nils Ingvar, Method for conserving power by adjusting clock frequency based on a repetitive timing cycle.
  50. Walker Gary, Method for optimizing performance versus power consumption using external/internal clock frequency ratios.
  51. Gasztonyi Laszlo R. (Penfield NY), Method of autonomously reducing power consumption in a computer sytem by compiling a history of power consumption.
  52. Shiell Jonathan H. ; Marshall ; Jr. Robert D., Microprocessor with rate of instruction operation dependent upon interrupt source for power consumption control.
  53. Tsunehiro Naoshi,JPX, Mobile unit communication apparatus having digital and analog communication modes and a method of controlling the same.
  54. Arroyo Ronald X. (Elgin TX) Hanna James T. (Austin TX), Multi-frequency clock generation with low state coincidence upon latching.
  55. Matoba Tsukasa,JPX, Multi-processor power saving system which dynamically detects the necessity of a power saving operation to control the.
  56. Hong Jeong-Woo (Seoul KRX) Park Hee-Duck (Suwon KRX) Cho Shung-hyun (Suwon KRX) Park Noh-Byung (Seoul KRX), Peripheral device input-initiated resume system for combined hibernation system and back-up power supply for computer.
  57. Perry Richard A. (Charlotte NC) Stant Vernon L. (Richmond VA), Power conservation in microprocessor controlled devices.
  58. Chen David Yu,TWX, Power conservation in synchronous SRAM cache memory blocks of a computer system.
  59. Atkinson Lee, Power conservation method for a portable computer with LCD display.
  60. Batcher Kenneth W., Power conservation system employing a snooze mode.
  61. Thompson David L., Power consumption reduction in medical devices by employing pipeline architecture.
  62. Jackson Robert T., Power control for mobile electronics using no-operation instructions.
  63. Gulick Dele E. (Austin TX) Hewitt Larry D. (Austin TX) Hogan Michael (Austin TX) Norris David (Austin TX), Power control of circuit modules within an integrated circuit.
  64. Gephardt Douglas D. (Austin TX) MacDonald James R. (Buda TX) O\Brien Rita M. (Austin TX), Power management architecture including a power management messaging bus for conveying an encoded activity signal for op.
  65. Ikeda Osamu (Tokyo JPX), Power saving control system for computer system.
  66. Ikeda Osamu (Tokyo JPX), Power saving control system for computer system with feature of selective initiation of power saving control.
  67. Cepuran Lawrence D. (Cary IL), Power saving method and apparatus for changing the frequency of a clock in response to a start signal.
  68. Iwazaki Yasuo,JPX, Power-saving clock control apparatus and method.
  69. Takikita Hiromichi,JPX, Printing apparatus and method of saving power of the same.
  70. McDermott Mark W. ; Fourcroy Antone L., Processor having a frequency modulated core clock based on the criticality of program activity.
  71. Brett Coon ; David Keppel ; Charles R. Price, Programmable event counter system.
  72. Watts ; Jr. LaVaughn F. ; Wallace Steven J., Real time power conservation for computers.
  73. Watts ; Jr. LaVaughn F., Real-time power conservation and thermal management for computers.
  74. La Vaughn F. Watts, Jr., Real-time power conservation and thermal management for electronic devices.
  75. Watts ; Jr. LaVaughn F. ; Wallace Steven J., Real-time power conservation for computers.
  76. Watts ; Jr. LaVaughn F. ; Wallace Steven J., Real-time power conservation for electronic device having a processor.
  77. Watts ; Jr. LaVaughn F. (Temple TX) Wallace Steven J. (Temple TX), Real-time power conservation for portable computers.
  78. Fujitani Sakae,JPX ; Suzuki Yuzuru,JPX, Recording disk drive using a synchronous driving motor.
  79. Maeda Yasuaki (Kanagawa JPX) Nagashima Hideki (Tokyo JPX) Nakamura Kosuke (Tokyo JPX), Reproducing apparatus having buffer memory and capable of rapidly restarting reproduction and method of controlling the.
  80. Mason Andrew Halstead ; Delmonico James Jonathan ; Schumann Reinhard Christoph, Skipping clock interrupts during system inactivity to reduce power consumption.
  81. Nowlin ; Jr. Dan Howard, Software-implemented tool for monitoring power management in a computer system.
  82. Yamaura Tomoya (Kanagawa JPX) Yamamoto Katsuya (Kanagawa JPX) Iwasaki Jun (Tokyo JPX) Fujita Etsumi (Chiba JPX), Spread spectrum communication system and transmitter-receiver.
  83. Davis Walter L. (Plantation FL) Herold Barry W. (Lauderhill FL) Little Wendell L. (Austin TX), Synthesized clock microcomputer with power saving.
  84. Sevcik Peter John ; Vigil Jeffrey Scott, System and method for conserving battery power in a mobile station searching to select a serving cell.
  85. Linoff Joseph D., System and method for controlled performance degradation in electronic circuits.
  86. Wong-Insley Becky, System and method for cross-platform application level power management.
  87. Fung Henry Tat-Sang, System and method of computer operating mode control for power consumption reduction.
  88. Patillon Jean-Noel,FRX ; Gerard Olivier,FRX, System for monitoring charging/discharging cycles of a rechargeable battery, and host device including a smart battery.
  89. Oh Se-Chun (Seungnam KRX), System for monitoring energy performance of secondary battery, and method therefor.
  90. Day Michael N. (Austin TX), System for reducing processor power consumption by stopping processor clock supply if a desired event does not occur.
  91. Kroll Mark W., System for selectively reforming an ICD.
  92. Larsson Patrik ; Nicol Christopher John, Technique for reducing power consumption in digital filters.
  93. Kleffner Werner,DEX, Telecommunication system with energy-saving mode.
  94. Flach Terry E. ; Stoop Michael D., Two-way TDMA telemetry system with power conservation features.
  95. Martin Vorbach DE; Robert Munch DE, UNIT FOR PROCESSING NUMERIC AND LOGIC OPERATIONS FOR USE IN CENTRAL PROCESSING UNITS (CPUS), MULTIPROCESSOR SYSTEMS, DATA-FLOW PROCESSORS (DSPS), SYSTOLIC PROCESSORS AND FIELD PROGRAMMABLE GATE ARRAY.
  96. Mitsunori Endo JP, USB apparatus and USB hub apparatus.
  97. Kawabe Toshiyuki,JPX ; Satoh Tatsuhiko,JPX, Uninterruptible power system.
  98. Dischler Richard J. ; Klumpp Jim ; Schumann Reinhard, Variable frequency clock control for microprocessor-based computer systems.
  99. Fairbanks John P. (Sunnyvale CA) Yuan Andy C. (Saratoga CA), Varying the supply voltage in response to the current supplied to a computer system.
  100. Suboh Abdel H. (Houston TX), Video subsystem power management apparatus and method.
  101. Suboh Abdel H. (Houston TX), Video subsystem power management apparatus and method.

이 특허를 인용한 특허 (213)

  1. Pisharodi, Madhavan, Adapter.
  2. C. R., Sunil Kumar; Kumar, Aruna; Radhakrishnan, Prakash K., Adapting operating parameters of an input/output (IO) interface circuit of a processor.
  3. Ignowski, James S.; Bace, Matthew M.; Dehaemer, Eric J.; Poirier, Chris, Adaptive algorithm for thermal throttling of multi-core processors with non-homogeneous performance states.
  4. Khodorkovsky, Oleksandr; Giemborek, Vladimir, Adaptive power state management.
  5. Graham, Carl Norman; Lim, Seow Chuan; Aristodemou, Aris; Mason, John R. M.; Hall, Tim; Nemouchi, Yazid; Wong, Kar-Lik, Adaptive video encoding apparatus and methods.
  6. Varma, Ankush; Steiner, Ian; Ananthakrishnan, Avinash; Sistla, Krishnakanth; Poirier, Chris; Bace, Matthew; Dehaemer, Eric, Adaptively limiting a maximum operating frequency in a multicore processor.
  7. Chen, Ching; Wu, Yi-Tsung; Luke, Hok-Sum Horace; Taylor, Matthew Whiting, Adjusting electric vehicle systems based on an electrical energy storage device thermal profile.
  8. Han, Jin Ho, Apparatus and method for controlling power related parameters by core unit according to detailed status information of the core and application for executing.
  9. Jones, Darren M., Apparatus and method for software specified power management performance using low power virtual threads.
  10. Thomas, Tessil; Kandula, Phani Kumar; Krithivas, Ramamurthy; Chin, Howard; Steiner, Ian M.; Garg, Vivek, Apparatus and method for thermal management in a multi-chip package.
  11. Conrad, Shaun M.; Gunther, Stephen H., Apparatus and method to manage energy usage of a processor.
  12. Luke, Hok-Sum Horace; Taylor, Matthew Whiting, Apparatus, method and article for authentication, security and control of power storage devices, such as batteries.
  13. Luke, Hok-Sum Horace; Taylor, Matthew Whiting, Apparatus, method and article for authentication, security and control of power storage devices, such as batteries, based on user profiles.
  14. Taylor, Matthew Whiting; Luke, Hok-Sum Horace, Apparatus, method and article for providing vehicle event data.
  15. Luke, Hok-Sum Horace; Taylor, Matthew Whiting, Apparatus, method and article for redistributing power storage devices, such as batteries, between collection, charging and distribution machines.
  16. Huang, Jui Sheng; Luke, Hok-Sum Horace; Chen, Ching, Apparatus, method and article for vehicle turn signals.
  17. Chen, Jung-Hsiu; Chen, Shen-Chi; Wu, Yu-Lin; Huang, Chien-Ming; Chan, TsungTing; Yang, Feng Kai, Apparatus, system, and method for vending, charging, and two-way distribution of electrical energy storage devices.
  18. Wang, Zhiguo; Ayers, David J.; Balasubramanian, Srikanth; Gupta, Sukirti; Rusu, Stefan; Ramey, Stephen M., Calculating a dynamically changeable maximum operating voltage value for a processor based on a different polynomial equation using a set of coefficient values and a number of current active cores.
  19. Pisharodi, Madhavan, Charge interrupting device.
  20. Pisharodi, Madhavan, Charge interrupting device.
  21. Pisharodi, Madhavan, Charge interrupting device.
  22. Pisharodi, Madhavan, Charge interrupting device.
  23. Pisharodi, Madhavan, Charge interrupting device.
  24. Pisharodi, Madhavan, Charge interrupting device.
  25. Narendra, Siva G.; Tschanz, James W.; De, Vivek K.; Tang, Stephen H., Component reliability budgeting system.
  26. Narendra, Siva G.; Tschanz, James W.; De, Vivek K.; Tang, Stephen H., Component reliability budgeting system.
  27. Narendra,Siva G.; Tschanz,James W.; De,Vivek K.; Tang,Stephen H., Component reliability budgeting system.
  28. Bhandaru, Malini K.; Dehaemer, Eric J.; Bobholz, Scott P.; Makaram, Raghunandan; Garg, Vivek, Configuring power management functionality in a processor.
  29. Bhandaru, Malini K.; Dehaemer, Eric J.; Bobholz, Scott P.; Makaram, Raghunandan; Garg, Vivek, Configuring power management functionality in a processor.
  30. Bhandaru, Malini K.; Dehaemer, Eric J.; Bobholz, Scott P.; Makaram, Raghunandan; Garg, Vivek, Configuring power management functionality in a processor.
  31. Bhandaru, Malini K.; Dehaemer, Eric J.; Bobholz, Scott P.; Makaram, Raghunandan; Garg, Vivek, Configuring power management functionality in a processor.
  32. Bhandaru, Malini K.; Dehaemer, Eric J.; Bobholz, Scott P.; Makaram, Raghunandan; Garg, Vivek, Configuring power management functionality in a processor including a plurality of cores by utilizing a register to store a power domain indicator.
  33. Ananthakrishnan, Avinash N.; Gunther, Stephen H.; Shrall, Jeremy J., Constraining processor operation based on power envelope information.
  34. Weissmann, Eliezer; Abu Salah, Hisham; Rotem, Efraim; Therien, Guy M.; Shulman, Nadav; Natanzon, Esfir; Diefenbaugh, Paul S., Controlling a guaranteed frequency of a processor.
  35. Ananthakrishnan, Avinash N.; Rotem, Efraim; Rajwan, Doron; Weissmann, Eliezer; Wells, Ryan; Shulman, Nadav, Controlling a turbo mode frequency of a processor.
  36. Ananthakrishnan, Avinash N.; Rotem, Efraim; Rajwan, Doron; Weissmann, Eliezer; Wells, Ryan; Shulman, Nadav, Controlling a turbo mode frequency of a processor.
  37. Ananthakrishnan, Avinash N.; Rotem, Efraim; Rajwan, Doron; Wiessman, Eliezer; Wells, Ryan; Shulman, Nadav, Controlling a turbo mode frequency of a processor.
  38. Shrall, Jeremy J.; Gunther, Stephen H.; Sistla, Krishnakanth V.; Wells, Ryan D.; Conrad, Shaun M., Controlling configurable peak performance limits of a processor.
  39. Shrall, Jeremy J.; Gunther, Stephen H.; Sistla, Krishnakanth V.; Wells, Ryan D.; Conrad, Shaun M., Controlling configurable peak performance limits of a processor.
  40. Shrall, Jeremy J.; Gunther, Stephen H.; Sistla, Krishnakanth V.; Wells, Ryan D.; Conrad, Shaun M., Controlling configurable peak performance limits of a processor.
  41. Ananthakrishnan, Avinash N.; Rodriguez, Jorge P., Controlling current consumption of a processor based at least in part on platform capacitance.
  42. Ananthakrishnan, Avinash N.; Rotem, Efraim; Rajwan, Doron; Shrall, Jeremy J.; Samson, Eric C.; Weissmann, Eliezer; Wells, Ryan, Controlling operating frequency of a core domain based on operating condition of a non-core domain of a multi-domain processor.
  43. Ananthakrishnan, Avinash N.; Rotem, Efraim; Rajwan, Doron; Shrall, Jeremy J.; Samson, Eric C.; Weissmann, Eliezer; Wells, Ryan, Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor.
  44. Ananthakrishnan, Avinash N.; Rotem, Efraim; Rajwan, Doron; Shrall, Jeremy J.; Samson, Eric C.; Wiessmann, Eliezer; Wells, Ryan, Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor.
  45. Wells, Ryan D.; Feit, Itai; Rajwan, Doron; Shulman, Nadav; Offen, Zeev; Sodhi, Inder M., Controlling operating voltage of a processor.
  46. Wells, Ryan D.; Feit, Itai; Rajwan, Doron; Shulman, Nadav; Offen, Zeev; Sodhi, Inder M., Controlling operating voltage of a processor.
  47. Weissmann, Eliezer; Rotem, Efraim; Abu Salah, Hisham; Aizik, Yoni; Rajwan, Doron; Rosenzweig, Nir; Leibovich, Gal; Sabin, Yevgeni; Levy, Shay, Controlling performance states of processing engines of a processor.
  48. Jahagirdar, Sanjeev S.; Damaraju, Satish K.; Chen, Yun-Han; Wells, Ryan D.; Sodhi, Inder M.; Sarurkar, Vishram; Drottar, Ken; Choubal, Ashish V.; Islam, Rabiul, Controlling power delivery to a processor via a bypass.
  49. Jahagirdar, Sanjeev S.; Damaraju, Satish K.; Chen, Yun-Han; Wells, Ryan D.; Sodhi, Inder M.; Sarurkar, Vishram; Drottar, Ken; Choubal, Ashish V.; Islam, Rabiul, Controlling power delivery to a processor via a bypass.
  50. Lim, Ghim Boon, Controlling processor performance scaling based on context.
  51. Lim, Ghim Boon, Controlling processor performance scaling based on context.
  52. Garg, Vivek; Gendler, Alexander; Raman, Arvind; Choubal, Ashish V.; Sistla, Krishnakanth V.; Mulla, Dean; Dehaemer, Eric J.; Agrawal, Rahul; Sotomayor, Guy G., Controlling telemetry data communication in a processor.
  53. Rangarajan, Thanunathan; Risbud, Vinayak P.; Yasmin, Tabassum, Controlling temperature of a system memory.
  54. Rangarajan, Thanunathan; Risbud, Vinayak P.; Yasmin, Tabassum, Controlling temperature of a system memory.
  55. Ananthakrishan, Avinash N.; Ziv, Tomer; Rajwan, Doron; Rotem, Efraim, Controlling temperature of multiple domains of a multi-domain processor using a cross domain margin.
  56. Ananthakrishnan, Avinash N.; Ziv, Tomer; Rajwan, Doron; Rotem, Efraim, Controlling temperature of multiple domains of a multi-domain processor using a cross-domain margin.
  57. Kumar, Anil K., Controlling turbo mode frequency operation in a processor.
  58. Struik, Pieter, Data processing device with adjustable performance level and method of operating such device.
  59. Pisharodi, Madhavan, Devices and methods for optimizing rechargeable battery life.
  60. Schluessler, Travis T.; Wells, Ryan D.; Romano, Yaakov, Distributing power to heterogeneous compute elements of a processor.
  61. Schluessler, Travis T.; Wells, Ryan D.; Romano, Yaakov, Distributing power to heterogeneous compute elements of a processor.
  62. Ganpule, Tapan A.; Sodhi, Inder M.; Talker, Yair; Falkov, Inbar; Khondker, Tanveer R., Dyanamically adapting a voltage of a clock generation circuit.
  63. Ganpule, Tapan A.; Sodhi, Inder M.; Talker, Yair; Falkov, Inbar; Khondker, Tanveer R., Dyanamically adapting a voltage of a clock generation circuit.
  64. Branover, Alexander; Steinman, Maurice B; Bircher, William L, Dynamic performance control of processing nodes.
  65. Costales, Edward; Kubick, Robert F.; N, Abdul R., Dynamic power state determination of a graphics processing unit.
  66. Dow, Eli M.; Kelly, Michael R.; Kolar, Harry R.; Passow, Michael L., Dynamic time sliced sensor sampling for reduced power consumption.
  67. Sistla, Krishnakanth; Mulla, Dean; Garg, Vivek; Rowland, Mark; Doraiswamy, Suresh; Srinivasa, Ganapati; Gilbert, Jeffrey D., Dynamically adjusting power of non-core processor circuitry including buffer circuitry.
  68. Sistla, Krishnakanth; Mulla, Dean; Garg, Vivek; Rowland, Mark; Doraiswamy, Suresh; Srinivasa, Ganapati; Gilbert, Jeffrey D., Dynamically adjusting power of non-core processor circuitry including buffer circuitry.
  69. Ananthakrishnan, Avinash N.; Rotem, Efraim; Rajwan, Doron; Weissmann, Eliezer; Shulman, Nadav, Dynamically allocating a power budget over multiple domains of a processor.
  70. Ananthakrishnan, Avinash N.; Rotem, Efraim; Rajwan, Doron; Weissmann, Eliezer; Shulman, Nadav, Dynamically allocating a power budget over multiple domains of a processor.
  71. Ananthakrishnan, Avinash N.; Rotem, Efraim; Rajwan, Doron; Weissmann, Eliezer; Shulman, Nadav, Dynamically allocating a power budget over multiple domains of a processor.
  72. Bhandaru, Malini K.; Dehaemer, Eric J.; Shrall, Jeremy J., Dynamically computing an electrical design point (EDP) for a multicore processor.
  73. Ananthakrishnan, Avinash N.; Rotem, Efraim; Weissmann, Eliezer; Rajwan, Doron; Shulman, Nadav; Naveh, Alon; Abu-Salah, Hisham, Dynamically controlling cache size to maximize energy efficiency.
  74. Ananthakrishnan, Avinash N.; Rotem, Efraim; Weissmann, Eliezer; Rajwan, Doron; Shulman, Nadav; Naveh, Alon; Abu-Salah, Hisham, Dynamically controlling cache size to maximize energy efficiency.
  75. Ananthakrishnan, Avinash N.; Rotem, Efraim; Weissmann, Eliezer; Rajwan, Doron; Shulman, Nadav; Naveh, Alon; Abu-Salah, Hisham, Dynamically controlling cache size to maximize energy efficiency.
  76. Bhandaru, Malini K.; Varma, Ankush; Vash, James R.; Wong-Chan, Monica; Dehaemer, Eric J.; Poirier, Sr., Christopher Allan; Bobholz, Scott P., Dynamically controlling interconnect frequency in a processor.
  77. Kupermann, Eli; Agranovsky, Elena, Dynamically controlling power management of an on-die memory of a processor.
  78. Luke, Hok-Sum Horace; Taylor, Matthew Whiting, Dynamically limiting vehicle operation for best effort economy.
  79. Varma, Ankush; Sistla, Krishnakanth V.; Rowland, Martin T.; Garg, Vivek; Burns, James S., Dynamically measuring power consumption in a processor.
  80. Sistla, Krishnakanth V.; Rowland, Mark; Varma, Ankush; Steiner, Ian M.; Bace, Matthew; Borkowski, Daniel; Garg, Vivek; Akturan, Chelsea; Ananthakrishnan, Avinash N., Dynamically modifying a power/performance tradeoff based on a processor utilization.
  81. Sistla, Krishnakanth V.; Rowland, Mark; Varma, Ankush; Steiner, Ian M.; Bace, Matthew; Borkowski, Daniel; Garg, Vivek; Akturan, Cagdas; Ananthakrishnan, Avinash N., Dynamically modifying a power/performance tradeoff based on processor utilization.
  82. Lee, Victor W.; Bai, Yuxin, Dynamically updating a power management policy of a processor.
  83. Zobel, Shmuel; Levit, Maxim; Rotem, Efraim; Weissmann, Eliezer; Rajwan, Doron; Shapira, Dorit; Shulman, Nadav, Dynamically updating at least one power management operational parameter pertaining to a turbo mode of a processor for increased performance.
  84. Varma, Ankush; Sistla, Krishnakanth V.; Sotomayor, Guy G.; Henroid, Andrew D.; Gough, Robert E.; Schiff, Tod F., Dynamically updating logical identifiers of cores of a processor.
  85. Ananthakrishnan, Avinash N.; Sodhi, Inder M.; Rotem, Efraim; Rajwan, Doron; Weissmann, Eliezer; Wells, Ryan, Enabling a non-core domain to control memory bandwidth in a processor.
  86. Ananthakrishnan, Avinash N.; Sodhi, Inder M.; Rotem, Efraim; Rajwan, Doron; Weissmann, Eliezer; Wells, Ryan, Enabling a non-core domain to control memory bandwidth in a processor.
  87. Ananthakrishnan, Avinash N.; Sodhi, Inder M.; Rotem, Efraim; Rajwan, Doron; Weissmann, Eliezer; Wells, Ryan, Enabling a non-core domain to control memory bandwidth in a processor.
  88. Ananthakrishnan, Avinash N.; Sodhi, Inder M.; Rotem, Efraim; Rajwan, Doron; Wiessman, Eliezer; Wells, Ryan, Enabling a non-core domain to control memory bandwidth in a processor.
  89. Ananthakrishnan, Avinash N.; Gunther, Stephen H.; Shrall, Jeremy J.; Schwartz, Jay D., Estimating scalability value for a specific domain of a multicore processor based on active state residency of the domain, stall duration of the domain, memory bandwidth of the domain, and a plurality of coefficients based on a workload to execute on the domain.
  90. Ananthakrishnan, Avinash N.; Rotem, Efraim; Feit, Itai; Ziv, Tomer; Rajwan, Doron; Shulman, Nadav; Naveh, Alon, Estimating temperature of a processor core in a low power state without thermal sensor information.
  91. Momeyer, Brian; Beckwith, Kevin M.; Nelson, Hui-Ya L.; Schevciw, Andre Gustavo P.; Oliveira, Louis Dominic; Heimbigner, Wade L.; Forutanpour, Babak, Force sensing touch screen.
  92. Weissmann, Eliezer; Aizik, Yoni; Rajwan, Doron; Rosenzweig, Nir; Rotem, Efraim; Cooper, Barnes; Diefenbaugh, Paul S.; Therien, Guy M.; Mishaeli, Michael; Shulman, Nadav; Melamed, Ido; Tokman, Niv; Gendler, Alexander; Gihon, Arik; Sabin, Yevgeni; Salah, Hisham Abu; Natanzon, Esfir, Forcing a processor into a low power state.
  93. Varma, Ankush; Sistla, Krishnakanth V.; Chu, Allen W.; Steiner, Ian M., Forcing core low power states in a processor.
  94. Titiano, Patrick C; Qasem, Safwan, Hardware voting mechanism for arbitrating scaling of shared voltage domain, integrated circuits, processes and systems.
  95. Mondjak, Idan; Majumder, Supratik; Yaacoby, Eyal, Identification of GPU phase to determine GPU scalability during runtime.
  96. Burns, James S.; Ganesan, Baskaran; Fenger, Russell J.; Bodas, Devadatta V.; Iyengar, Sundaravarathan R.; Nelson, Feranak; Powell, Jr., John M.; Sugumar, Suresh, Increasing power efficiency of turbo mode operation in a processor.
  97. Burns, James S.; Ganesan, Baskaran; Fenger, Russell J.; Bodas, Devadatta V.; Iyengar, Sundaravarathan R.; Nelson, Feranak; Powell, Jr., John M.; Sugumar, Suresh, Increasing power efficiency of turbo mode operation in a processor.
  98. Burns, James S.; Ganesan, Baskaran; Fenger, Russell J.; Bodas, Devadatta V.; Iyengar, Sundaravarathan R.; Nelson, Feranak; Powell, Jr., John M.; Sugumar, Suresh, Increasing power efficiency of turbo mode operation in a processor.
  99. Guddeti, Jayakrishna; Bhattacharyya, Binata, Increasing turbo mode residency of a processor.
  100. Guddeti, Jayakrishna; Bhattacharyya, Binata, Increasing turbo mode residency of a processor.
  101. Guddeti, Jayakrishna; Bhattacharyya, Binata, Increasing turbo mode residency of a processor.
  102. Conrad, Shuan M.; Gunther, Stephen H.; Shrall, Jeremy J.; Deval, Anant S.; Jahagirdar, Sanjeev S., Independent control of processor core retention states.
  103. Sodhi, Inder; Jahagirdar, Sanjeev; Wells, Ryan; Offen, Zeev; Sharma, Shalini; Drottar, Ken, Independently controlling frequency of plurality of power domains in a processor system.
  104. Kobayashi, Keita; Morita, Ryoko; Ito, Yusuke; Ichinose, Naoya; Araki, Shoichi; Nishimura, Osamu; Sasaoka, Toshio; Matsushima, Yoko, Information processing device and mobile phone including comparison of power consumption information and remaining power.
  105. Ganor, Assaf; Rotem, Efraim; Winer, Noam; Vikinski, Omer, Integrating a power arbiter in a processor.
  106. Pisharodi, Madhavan, Interrupting the charging status of a rechargeable battery.
  107. Svilan, Vjekoslav; Mackintosh, David N., Managing dynamic capacitance using code scheduling.
  108. Bodas, Devadatta V.; Crawford, John H.; Gara, Alan G., Managing power consumption and performance of computing systems.
  109. Fetzer, Eric; Reidlinger, Reid J.; Soltis, Don; Bowhill, William J.; Shrimali, Satish; Sistla, Krishnakanth; Rotem, Efraim; Kumar, Rakesh; Garg, Vivek; Naveh, Alon; Sharma, Lokesh, Managing power consumption in a multi-core processor.
  110. Fetzer, Eric; Riedlinger, Reid; Soltis, Don; Bowhill, William; Shrimali, Satish; Sistla, Krishnakanth; Rotem, Efraim; Kumar, Rakesh; Garg, Vivek; Naveh, Alon; Sharma, Lokesh, Managing power consumption in a multi-core processor.
  111. Floyd, Michael S.; Rajamani, Karthick; Rawson, III, Freeman L.; Ware, Malcolm S., Managing the power-performance range of an application.
  112. Weissmann, Eliezer; Rotem, Efraim; Diefenbaugh, Paul; Therien, Guy; Rosenzweig, Nir, Mapping a performance request to an operating frequency in a processor.
  113. Weissmann, Eliezer; Rotem, Efraim; Diefenbaugh, Paul; Therien, Guy; Rosenzweig, Nir, Mapping a performance request to an operating frequency in a processor.
  114. Gendler, Alexander; Novakovsky, Larisa; Sistla, Krishnakanth V.; Garg, Vivek; Mulla, Dean; Choubal, Ashish V.; Hallnor, Erik G.; Weier, Kimberly C., Masking a power state of a core of a processor.
  115. Murakami, Takeo, Measuring method of a processing load of a processor including a plurality of cores.
  116. Conrad, Shaun M.; Shrall, Jeremy J., Method and apparatus for atomic frequency and voltage changes.
  117. Wei, Konggang; Guo, Yuhua; Peng, Yu, Method and apparatus for controlling central processing unit.
  118. Branover, Alexander; Steinman, Maurice; Bircher, William L., Method and apparatus for demand-based control of processing node performance.
  119. Tremel, Christopher J.; Morlock, Brian M.; Schmitz, Michael J., Method and apparatus for dynamic power management control using serial bus management protocols.
  120. Hu, Chunling; Liu, Jack, Method and apparatus for dynamic voltage and frequency scaling.
  121. Jorgenson, Joel A.; Kakumanu, Divyata; Morlock, Brian M., Method and apparatus for on-demand power management.
  122. Jorgenson, Joel A.; Kakumanu, Divyata; Morlock, Brian M., Method and apparatus for on-demand power management.
  123. Jorgenson, Joel A.; Kakumanu, Divyata; Morlock, Brian M., Method and apparatus for on-demand power management.
  124. Jorgenson, Joel A.; Kakumanu, Divyata; Morlock, Brian M., Method and apparatus for on-demand power management.
  125. Jorgenson,Joel A.; Kakumanu,Divyata; Morlock,Brian M., Method and apparatus for on-demand power management.
  126. Jorgenson,Joel A.; Kakumanu,Divyata; Morlock,Brian M., Method and apparatus for on-demand power management.
  127. Jorgenson,Joel A.; Kakumanu,Divyata; Morlock,Brian M., Method and apparatus for on-demand power management.
  128. Ardron, David Neil, Method and apparatus for selective heating for electronic components of a handheld device.
  129. Suryanarayanan, Anupama; Merten, Matthew C.; Carlson, Ryan L., Method and apparatus to prevent voltage droop in a computer.
  130. Gendler, Alexander, Method and apparatus to provide telemetry data to a power controller of a processor.
  131. Steinman, Maurice B.; Branover, Alexander J.; Krishnan, Guhan, Method for SOC performance and power optimization.
  132. Kashyap, Vivek; Lefurgy, Charles R; Sarma, Dipankar, Method for power capping with co-operative dynamic voltage and frequency scaling via shared p-state table.
  133. Jun, Sung Ik; An, Baik Song; On, Jin Ho; Woo, Young Choon; Choi, Wan, Method of dynamically controlling power in multicore environment.
  134. Kim, Seongwoo; Shrall, Jeremy; Schwartz, Jay D.; Gunther, Stephen H.; Furrer, Travis C., Method, apparatus, and system for energy efficiency and energy conservation including balancing power among multi-frequency domains of a processor based on efficiency rating scheme.
  135. Shah, Ketan R.; Distefano, Eric; Gunther, Stephen H.; Shrall, Jeremy J., Method, apparatus, and system for energy efficiency and energy conservation including configurable maximum processor current.
  136. Jahagirdar, Sanjeev S.; Wells, Ryan; Sodhi, Inder, Method, apparatus, and system for energy efficiency and energy conservation including determining an optimal power state of the apparatus based on residency time of non-core domains in a power saving state.
  137. Jahagirdhar, Sanjeev S.; Wells, Ryan; Sodhi, Inder, Method, apparatus, and system for energy efficiency and energy conservation including determining an optimal power state of the apparatus based on residency time of non-core domains in a power saving state.
  138. Naveh, Alon; Weissmann, Eliezer; Nathan, Ofer; Shulman, Nadav, Method, apparatus, and system for energy efficiency and energy conservation including optimizing C-state selection under variable wakeup rates.
  139. Naveh, Alon; Weissmann, Eliezer; Nathan, Ofer; Shulman, Nadav, Method, apparatus, and system for energy efficiency and energy conservation including optimizing C-state selection under variable wakeup rates.
  140. Rajappa, Muralidhar; Hoffman, Andy; Bodas, Devadatta; Song, Justin; Alexander, James; Schaefer, Joseph A.; Mahawar, Sunil, Methods and apparatus to estimate power performance of a job that runs on multiple nodes of a distributed computer system.
  141. Herdrich, Andrew; Illikkal, Ramesh; Newell, Donald; Iyer, Ravishankar; Chadha, Vineet, Methods and apparatuses for controlling thread contention.
  142. Herdrich, Andrew; Illikkal, Ramesh; Newell, Donald; Iyer, Ravishankar; Chadha, Vineet, Methods and apparatuses for controlling thread contention.
  143. Herdrich, Andrew; Illikkal, Ramesh; Newell, Donald; Iyer, Ravishankar; Chadha, Vineet, Methods and apparatuses for controlling thread contention.
  144. Herdrich, Andrew; Illikkal, Ramesh; Newell, Donald; Iyer, Ravishankar; Chadha, Vineet, Methods and apparatuses for controlling thread contention.
  145. Herdrich, Andrew; Illikkal, Ramesh; Newell, Donald; Iyer, Ravishankar; Chadha, Vineet, Methods and apparatuses for controlling thread contention.
  146. Herdrich, Andrew; Illikkal, Ramesh; Newell, Donald; Iyer, Ravishankar; Chadha, Vineet, Methods and apparatuses for controlling thread contention.
  147. Herdrich, Andrew; Illikkal, Ramesh; Newell, Donald; Iyer, Ravishankar; Chadha, Vineet, Methods and apparatuses for controlling thread contention.
  148. Herdrich, Andrew; Illikkal, Ramesh; Newell, Donald; Iyer, Ravishankar; Chadha, Vineet, Methods and apparatuses for controlling thread contention.
  149. Naveh, Alon; Yosef, Yuval; Weissmann, Eliezer; Aggarwal, Anil; Rotem, Efraim; Mendelson, Avi; Ronen, Ronny; Ginzburg, Boris; Mishaeli, Michael; Hahn, Scott D.; Koufaty, David A.; Srinivasa, Ganapati; Therien, Guy, Migrating tasks between asymmetric computing elements of a multi-core processor.
  150. Karayi, Sumir; Blackburn, Mark; Hawkins, Andrew; Kasadha, Fredrick; Sosna, Agnieszka; Sykes, Edward; Cudd, Richard; Chang, Sophie, Monitoring the performance of a computer.
  151. Kim, Daehyun; Park, Jong Soo; Woo, Dong Hyuk; Yoo, Richard M.; Hughes, Christopher J., Monitoring vector lane duty cycle for dynamic optimization.
  152. Wu, Yi-Tsung; Lin, Sung-Ching; Hsu, Chen-Shin; Chen, Yu-Min, Multidirectional electrical connector, plug and system.
  153. Kang, Jack, Multithread processor with thread based throttling.
  154. Nanja, Murthi, Performance monitoring based dynamic voltage and frequency scaling.
  155. Man, Xiuting C.; Derr, Michael N.; Schwartz, Jay D.; Gunther, Stephen H.; Shrall, Jeremy J.; Conrad, Shaun M.; Ananthakrishan, Avinash N., Performing cross-domain thermal control in a processor.
  156. Man, Xiuting C.; Derr, Michael N.; Schwartz, Jay D.; Gunther, Stephen H.; Shrall, Jeremy J.; Conrad, Shaun M.; Ananthakrishnan, Avinash N., Performing cross-domain thermal control in a processor.
  157. Varma, Ankush; Sistla, Krishnakanth V.; Srinivasan, Vasudevan; Gorbatov, Eugene; Henroid, Andrew D.; Cooper, Barnes; Browning, David W.; Therien, Guy M.; Songer, Neil W.; Hermerding, II, James G., Performing dynamic power control of platform devices.
  158. Varma, Ankush; Sistla, Krishnakanth V.; Steiner, Ian M.; Garg, Vivek; Poirier, Chris; Rowland, Martin T., Performing frequency coordination in a multiprocessor system.
  159. Varma, Ankush; Sistla, Krishnakanth V., Performing frequency coordination in a multiprocessor system based on response timing optimization.
  160. Lee, Victor W.; Grochowski, Edward T.; Kim, Daehyun; Bai, Yuxin; Li, Sheng; Mellempudi, Naveen K.; Kalamkar, Dhiraj D., Performing power management in a multicore processor.
  161. Lee, Victor W.; Kim, Daehyun; Bai, Yuxin; Ji, Shihao; Li, Sheng; Kalamkar, Dhiraj D.; Mellempudi, Naveen K., Performing power management in a multicore processor.
  162. Bodas, Devadatta V. (Deva); Song, Justin J.; Rajappa, Muralidhar (Murali); Hoffman, Andy; Alexander, James W. (Jimbo); Schaefer, Joseph A.; Mahawar, Sunil K., Power aware job scheduler and manager for a data processing system.
  163. Yoo, Heejong; Kamath, Nidish Ramachandra; Choy, Eddie L. T.; John, Johnny K; Gupta, Samir Kumar, Power efficient batch-frame audio decoding apparatus, system and method.
  164. Wang, Ren; Samih, Ahmad; Delano, Eric; Shah, Pinkesh J.; Chishti, Zeshan A.; Maciocco, Christian; Tai, Tsung-Yuan Charlie, Power gating a portion of a cache memory.
  165. Wang, Ren; Samih, Ahmad; Delano, Eric; Shah, Pinkesh J.; Chishti, Zeshan A.; Maciocco, Christian; Tai, Tsung-Yuan Charlie, Power gating a portion of a cache memory.
  166. Min, John S., Power management for system having one or more integrated circuits.
  167. Morgan, Bryan C.; Vaidya, Priya N.; Sakarda, Premanand; Moncrieffe, Marlon A., Power management in electronic systems.
  168. Hoberman, Barry Alan; Hillman, Daniel L.; Shiell, Jon, Power managers for an integrated circuit.
  169. Hoberman, Barry Alan; Hillman, Daniel L.; Shiell, Jon, Power managers for an integrated circuit.
  170. Kaneko, Yoshihiro; Andou, Hideaki; Mizuura, Yasuyuki, Power-saving effect apparatus and method based on power-saving parameters and power-saving amounts.
  171. Song, Justin J.; Diao, Qian, Predicting future power level states for processor cores.
  172. Song, Justin; Diao, Qian, Predicting future power level states for processor cores.
  173. Song, Justin; Diao, Qian, Predicting future power level states for processor cores.
  174. Walrath, Craig A., Prioritizing power-consuming applications of an electronic device powered by a battery.
  175. Aizik, Yoni; Weissmann, Eliezer; Rotem, Efraim; Sabin, Yevgeni; Rajwan, Doron; Yasin, Ahmad, Processor operating by selecting smaller of requested frequency and an energy performance gain (EPG) frequency.
  176. Kuwahara, Yuji, Processor system for varying clock frequency and voltage in response to a comparison of instruction execution rate to a reference value.
  177. Emberling, Brian D.; Presant, Stephen D.; Hendrickson, Seth; Sitaraman, Krishna; Ibrahim, Ali; Herman, Jeff, Processor with power control via instruction issuance.
  178. Song, Justin J.; Bodas, Devadatta V. (Deva); Rajappa, Muralidhar (Murali); Hoffman, Andy; Alexander, James W. (Jimbo); Schaefer, Joseph A.; Mahawar, Sunil K., Profiling a job power and energy consumption for a data processing system.
  179. Diamand, Israel; Rubinstein, Asaf; Gihon, Arik; Kuzi, Tal; Ziv, Tomer; Shulman, Nadav, Programmable power management agent.
  180. Conrad, Neena; Conrad, Shaun M.; Gunther, Stephen H., Providing an inter-arrival access timer in a processor.
  181. Bhandaru, Malini K.; Dehaemer, Eric J., Providing energy efficient turbo operation of a processor.
  182. Kumar, Pankaj; Nguyen, Hang T.; Houghton, Christopher; Biermann, David A., Providing per core voltage and frequency control.
  183. Kumar, Pankaj; Nguyen, Hang T.; Houghton, Christopher; Biermann, David A., Providing per core voltage and frequency control.
  184. Kumar, Pankaj; Nguyen, Hang T.; Houghton, Christopher; Biermann, David A., Providing per core voltage and frequency control.
  185. Kumar, Pankaj; Nguyen, Hang T.; Houghton, Christopher; Biermann, David A., Providing per core voltage and frequency control.
  186. Kumar, Pankaj; Nguyen, Hang T.; Houghton, Christopher; Biermann, David A., Providing per core voltage and frequency control.
  187. Kumar, Pankaj; Nguyen, Hang T.; Houghton, Christopher; Biermann, David A., Providing per core voltage and frequency control.
  188. Kumar, Pankaj; Nguyen, Hang; Houghton, Christopher; Biermann, David A., Providing per core voltage and frequency control.
  189. Micu, Anderson I., Rainfall prediction and compensation in irrigation control.
  190. Sodhi, Inder M.; Cooper, Barnes; Diefenbaugh, Paul S.; Siddiqi, Faraz A.; Calyer, Michael; Henroid, Andrew D.; Singh, Ruchika, Rescheduling workloads to enforce and maintain a duty cycle.
  191. Gendler, Alexander; Leifman, George, Restricting clock signal delivery based on activity in a processor.
  192. Gendler, Alexander; Rotem, Efraim; Mandelblat, Julius; Lyakhov, Alexander; Novakovsky, Larisa; Leifman, George; Makovsky, Lev; Sabba, Ariel; Tokman, Niv, Restricting clock signal delivery in a processor.
  193. Pires Dos Reis Moreira, Orlando; Van Berkel, Cornelis, Scheduling of global voltage/frequency scaling switches among asynchronous dataflow dependent processors.
  194. Ramani, Sundar; Raman, Arvind; Mandhani, Arvind; Choubal, Ashish V.; Muthukumar, Kalyan; Durg, Ajaya V.; Chakki, Samudyatha, Selecting a low power state based on cache flush latency determination.
  195. Ramani, Sundar; Raman, Arvind; Mandhani, Arvind; Choubal, Ashish V.; Muthukumar, Kalyan; Durg, Ajaya V.; Chakki, Samudyatha, Selecting a low power state based on cache flush latency determination.
  196. Hern, Randall A.; Fern, David G.; Peterson, Gerald E.; Redmond, David M., Sensor device for use in controlling irrigation.
  197. Hern, Randall A.; Fern, David G.; Peterson, Gerald E.; Redmond, David M., Sensor device for use in controlling irrigation.
  198. Paul, Indrani; Arora, Manish; Manne, Srilatha; Bircher, William L., Setting power-state limits based on performance coupling and thermal coupling between entities in a computing device.
  199. Mann, Xiuting C.; Ananthakrishnan, Avinash; Derr, Michael N.; Forbell, Craig, Sharing power between domains in a processor package using encoded power consumption information from a second domain to calculate an available power budget for a first domain.
  200. Morgan, Bryan C; Sakarda, Premanand; Vaidya, Priya N; Ge, Yi; Gao, Zhou; Pang, Swee-chin; Thadani, Manoj I; Yuan, Canhui, System and method for adaptive power management based on processor utilization and cache misses.
  201. Branover, Alexander J.; Govindan, Madhu Saravana Sibi; Krishnan, Guhan; Mohapatra, Hemant R.; Lueck, Andrew W., System and method for determining a power estimate for an I/O controller based on monitored activity levels and adjusting power limit of processing units by comparing the power estimate with an assigned power limit for the I/O controller.
  202. Mathew, Mithran, System and method for power reduction when decompressing video streams for interferometric modulator displays.
  203. Simeral, Brad, System and process for accounting for aging effects in a computing device.
  204. Morgan, Bryan C.; Vaidya, Priya N.; Sakarda, Premanand; Moncrieffe, Marlon A., System for managing power provided to a processor or memory based on a measured memory consumption characteristic.
  205. Salsbery, Brian J.; Gargash, Norman S., Systems and methods for optimizing the configuration of a set of performance scaling algorithms.
  206. Taylor, Matthew Whiting; Luke, Hok-Sum Horace, Systems and methods for utilizing an array of power storage devices, such as batteries.
  207. Suryanarayanan, Anupama; Ananthakrishnan, Avinash N.; Ashok, Chinmay; Shrall, Jeremy J., Techniques to enable communication between a processor and voltage regulator.
  208. Redmond, David M.; Tennyson, Michael J.; Hern, Randall A.; Peterson, Gerald E., User interface for a sensor-based interface device for interrupting an irrigation controller.
  209. Redmond, David M.; Tennyson, Michael J.; Hern, Randall A.; Peterson, Gerald E.; Fern, David G., User interface for a sensor-based interface device for interrupting an irrigation controller.
  210. Sistla, Krishnakanth V.; Shrall, Jeremy; Gunther, Stephen H.; Rotem, Efraim; Naveh, Alon; Weissmann, Eliezer; Aggarwal, Anil; Rowland, Martin T.; Varma, Ankush; Steiner, Ian M.; Bace, Matthew; Ananthakrishnan, Avinash N.; Brandt, Jason, User level control of power management policies.
  211. Sistla, Krishnakanth V.; Shrall, Jeremy; Gunther, Stephen H.; Rotem, Efraim; Naveh, Alon; Weissmann, Eliezer; Aggarwal, Anil; Rowland, Martin T.; Varma, Ankush; Steiner, Ian M.; Bace, Matthew; Ananthakrishnan, Avinash N.; Brandt, Jason, User level control of power management policies.
  212. Sistla, Krishnakanth V.; Shrall, Jeremy; Gunther, Stephen H.; Rotem, Efraim; Naveh, Alon; Weissmann, Eliezer; Aggarwal, Anil; Rowland, Martin T.; Varma, Ankush; Steiner, Ian M.; Bace, Matthew; Ananthakrishnan, Avinash N.; Brandt, Jason, User level control of power management policies.
  213. Huiku, Matti Veli Tapani, Wireless patient monitoring system and method.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로