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Intrinsic thermal enhancement for FBGA package 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/34
  • H01L-023/10
  • H01L-023/02
  • H01L-023/36
출원번호 US-0172922 (2002-06-17)
발명자 / 주소
  • Yee,Pak Hong
  • Lee,Teck Kheng
출원인 / 주소
  • Micron Technology, Inc.
대리인 / 주소
    Whyte Hirschboeck Dudek SC
인용정보 피인용 횟수 : 15  인용 특허 : 26

초록

A semiconductor device for dissipating heat generated by a die during operation and having a low height profile, a semiconductor die package incorporating the device, and methods of fabricating the device and package are provided. In one embodiment, the semiconductor device comprises a thick thermal

대표청구항

What is claimed is: 1. A semiconductor device, comprising: a support substrate having a first side and a second side; and a plurality of thermally-conductive via interconnects extending therethrough; a thermally-conductive plane layer overlying the first side of the support substrate; a first solde

이 특허에 인용된 특허 (26)

  1. Hembree David R., Attachment method for heat sinks and devices involving removal of misplaced encapsulant.
  2. Chien Ping Huang TW; Kevin Chiang TW; Tzong Da Ho TW, Ball grid array integrated circuit package structure.
  3. Selna Erich (Mountain View CA), Ball grid array package for a integrated circuit.
  4. Castro, Abram M., Ball grid substrate for lead-on-chip semiconductor package.
  5. Lo Randy H. Y.,TWX ; Lai Jeng Yuan,TWX ; Ko Eric,TWX ; Ho Tzong-Da,TWX, Ball-grid array integrated circuit package with an embedded type of heat-dissipation structure and method of manufacturing the same.
  6. Hembree David R., Chip on board with heat sink attachment.
  7. Il Kwon Shim ; Chang Kyu Park KR; Byung Joon Han KR; Vincent DiCaprio ; Paul Hoffman, Chip-scale semiconductor package of the fan-out type and method of manufacturing such packages.
  8. Salman Akram ; Larry Kinsman, Heat sink chip package.
  9. Salman Akram ; Larry Kinsman, Heat sink chip package.
  10. Akram Salman ; Kinsman Larry, Heat sink chip package and method of making.
  11. Moden Walter L. ; Corisis David J. ; Kinsman Larry D. ; Mess Leonard E., Heat sink with alignment and retaining features.
  12. Frank J. Juskey ; John R. McMillan ; Ronald P. Huemoeller, Low-cost printed circuit board with integral heat sink for semiconductor package.
  13. Shian-Yih Wang TW; Yung-Chih Chen TW; Lung-Cheng Cheng TW; Shi-Ing Huang TW; Chun-Sheng Chen TW, Manufacturing method of fluoro based composite boards.
  14. Jiang Tongbi ; Schrock Edward, Method for fabricating BGA package using substrate with patterned solder mask open in die attach area.
  15. Glenn Thomas P. ; Hollaway Roy D.,PHX ; Panczak Anthony E., Method of making integrated circuit package having adhesive bead supporting planar lid above planar substrate.
  16. Ho, Tzong-Da; Huang, Chien-Ping, Semicondctor package.
  17. Wilson James W. (Vestal NY), Semiconductor chip package with enhanced thermal conductivity.
  18. Kinsman Larry ; Akram Salman, Semiconductor device comprising a socket and method for forming same.
  19. Ma Manny Kin F., Semiconductor device having a built-in heat sink and process of manufacturing same.
  20. Kinsman Larry D. ; Akram Salman, Semiconductor device, ball grid array connection system, and method of making.
  21. Larry D. Kinsman ; Salman Akram, Semiconductor device, ball grid array connection system, and method of making.
  22. Morio Gaku JP; Nobuyuki Ikeguchi JP; Nobuyuki Yamane JP, Semiconductor plastic package and process for the production thereof.
  23. Akram Salman, Stacked leads-over-chip multi-chip module.
  24. Hashemi, Hassan S.; Cote, Kevin J., Structure and method for fabrication of a leadless multi-die carrier.
  25. Zhao, Sam Ziqun; Khan, Reaz-ur Rahman; Law, Edward; Papageorge, Marc, Thermally and electrically enhanced ball grid array packaging.
  26. Huang Chien-Ping,TWX ; Her Tzong-Dar,TWX ; Chiang Kevin,TWX, Tiny ball grid array package.

이 특허를 인용한 특허 (15)

  1. Kaskoun, Kenneth; Gu, Shiqun; Nowak, Matthew, 3-D integrated circuit lateral heat dissipation.
  2. Hu, Hsien-Pin; Yu, Chen-Hua; Jeng, Shin-Puu; Hou, Shang-Yun; Lin, Jing-Cheng; Chiou, Wen-Chih; Tu, Hung-Jung, Approach for bonding dies onto interposers.
  3. Morrison, Michael W., Ball grid array structures having tape-based circuitry.
  4. Xi, Xiaomei; Zhong, Linda; Mitchell, Porter, Composite electrode and method for fabricating same.
  5. Fresard,Alex; Crawford,Robert, Coupling of cell to housing.
  6. Zhong, Linda; Xi, Xiaomei; Mitchell, Porter; Zou, Bin, Dry particle based energy storage device product.
  7. Watanabe, Yousuke, Mobile terminal device and method for radiating heat therefrom.
  8. Gertiser, Kevin M.; Ripple, Richard A.; Lowry, Michael J.; Schten, Karl A.; Shearer, Ronald M.; Spall, Jim M., Multi-layer electrically isolated thermal conduction structure for a circuit board assembly.
  9. Hung, Jui-Pin; Lin, Jing-Cheng; Liu, Nai-Wei; Chang, Chin-Chuan; Yu, Chen-Hua; Jeng, Shin-Puu; Kao, Chin-Fu; Mao, Yi-Chao; Lu, Szu Wei, Packaging methods and structures using a die attach film.
  10. Hung, Jui-Pin; Lin, Jing-Cheng, Packaging methods for semiconductor devices.
  11. Hung, Jui-Pin; Lin, Jing-Cheng, Packaging methods for semiconductor devices.
  12. Mitchell, Porter; Zhong, Linda; Hermann, Vincent; Nanjundiah, Chenniah, Particle based electrodes and methods of making same.
  13. Abbott, Donald C, Semiconductor package having buss-less substrate.
  14. Thrap, Guy C.; Borkenhagen, James L.; Wardas, Mark; Schneuwly, Adrian; Lauper, Philippe, Thermal interconnects for coupling energy storage devices.
  15. Berlin,Carl W.; Sarma,Dwadasi Hara Rama; Myers,Bruce A., Thermal management of surface-mount circuit devices on laminate ceramic substrate.
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