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Interposer configured to reduce the profiles of semiconductor device assemblies and packages including the same and methods 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/02
출원번호 US-0150893 (2002-05-17)
우선권정보 SG-200201263(2002-03-04)
발명자 / 주소
  • Lee,Teck Kheng
출원인 / 주소
  • Micron Technology, Inc.
대리인 / 주소
    TraskBritt
인용정보 피인용 횟수 : 15  인용 특허 : 154

초록

An interposer includes a substrate, first and second sets of contact pads carried by the substrate, and receptacles formed in a surface of the substrate and exposing contact pads of the second set. The interposer may also include conductive traces carried by the substrate to electrically connect cor

대표청구항

What is claimed is: 1. An interposer for use in a semiconductor device assembly or package, comprising: a substantially planar interposer substrate; at least one attach region on a surface of the interposer substrate including at least one conductive structure for contacting a back side of a semic

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  4. Liang, Steve Xin; Liang, Chih-Chung; Lin, Yu-Bin; Wang, Yaqin; Zhang, Youhai, Etching-before-packaging horizontal chip 3D system-level metal circuit board structure and technique thereof.
  5. Zhang, Youhai; Zhang, Kai; Liao, Xiaojing; Wang, Yaqin; Wang, Sunyan, Etching-before-packaging three-dimensional system-level metal circuit board structure inversely provided with chip, and technological method.
  6. Liang, Chih-Chung; Wang, Yaqin; Zhang, Chunyan; Lin, Yu-Bin; Zhang, Youhai, First-etched and later-packaged three-dimensional system-in-package normal chip stack package structure and processing method thereof.
  7. Keser, Lizabeth Ann; Rae, David Fraser; Gupta, Piyush, Low profile integrated circuit (IC) package comprising a plurality of dies.
  8. Huang, Chien-Ping; Wang, Yu-Po; Huang, Chih-Ming, Method for fabricating semiconductor package free of substrate.
  9. Maniwa, Susumu; Tsukamoto, Takehito; Toda, Junko, Method for manufacturing substrate for semiconductor element, and semiconductor device.
  10. Nulty, James E.; Hunter, James A.; Herrera, Alexander J., Method of fabricating a probe card.
  11. Chen, Meng-Tse; Lin, Wei-Hung; Tsai, Yu-Peng; Lin, Chun-Cheng; Lin, Chih-Wei; Cheng, Ming-Da; Liu, Chung-Shi, Packaging methods and packaged semiconductor devices.
  12. Lin, Wei-Hung; Cheng, Ming-Da; Liu, Chung-Shi; Chen, Wei-Yu; Lin, Hsiu-Jen; Huang, Kuei-Wei, Packaging methods and packaged semiconductor devices.
  13. Lee, Teck Kheng, Semiconductor device assemblies.
  14. Mallik,Debendra; Ichikawa,Kinya; Sterrett,Terry L.; Swan,Johanna, Stackable integrated circuit packaging.
  15. Reiss,Martin; Nocke,Kerstin, Substrate based IC-package.
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