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특허 상세정보

Apparatus and method for adopting an orphan I/O port in a redundant storage controller

특허상세정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) G06F-013/00   
미국특허분류(USC) 710/302; 710/305; 710/304; 711/111; 714/100
출원번호 US-0946341 (2004-09-21)
발명자 / 주소
출원인 / 주소
인용정보 피인용 횟수 : 16  인용 특허 : 26
초록

A storage controller configured to adopt orphaned I/O ports is disclosed. The controller includes multiple field-replaceable units (FRUs) that plug into a backplane having local buses. At least two of the FRUs have microprocessors and memory for processing I/O requests received from host computers for accessing storage devices controlled by the controller. Other of the FRUs include I/O ports for receiving the requests from the hosts and bus bridges for bridging the I/O ports to the backplane local buses in such a manner that if one of the processing FRUs...

대표
청구항

We claim: 1. A storage controller, for providing fault-tolerant access to storage devices for host computers, comprising: a backplane; a first hot-pluggable field-replaceable unit (FRU), coupled to said backplane and having an input/output (I/O) port configured to receive from the host computers I/O requests to access the storage devices; and second and third hot-pluggable FRUs, each coupled to said backplane and having a microprocessor, wherein said second FRU is initially configured to process said I/O requests received by said I/O port, wherein said ...

이 특허에 인용된 특허 (26)

  1. Surugucchi Krishnakumar Rao ; George Geeta. Apparatus and method for coupling devices to a PCI-to-PCI bridge in an intelligent I/O controller. USP2000076094699.
  2. Okazawa Koichi (Tokyo JPX) Kimura Koichi (Yokohama JPX) Kawaguchi Hitoshi (Yokohama JPX) Aburano Ichiharu (Hitachi JPX) Kobayashi Kazushi (Ebina JPX) Mochida Tetsuya (Yokohama JPX). Bus system for use with information processing apparatus. USP1997095668956.
  3. Pecone, Victor Key. Bus zoning in a channel independent storage controller architecture. USP2005016839788.
  4. Brian Arsenault ; Victor W. Tung ; Jeffrey Stoddard Kinne. Data storage system. USP2002126493795.
  5. Tawfik David A. (Woodcliff Lake NJ) Doniger Jerry (Montvale NJ) Porawski Donald J. (Cedar Grove NJ). Digital flight guidance system. USP1980084217486.
  6. Sgammato, Frank J.. Dynamic port mode selection for crosspoint switch. USP2003016507581.
  7. Tim Teitenberg ; Bikram Singh Bakshi. Efficient memory management for channel drivers in next generation I/O system. USP2002076421769.
  8. Olarig Sompong Paul. Failover memory for a computer system. USP2000036038680.
  9. Nielson Michael E. (Broomfield CO) Brant William A. (Boulder CO) Neben Gary (Boulder CO). Fault tolerant memory system which utilizes data from a shadow memory device upon the detection of erroneous data in a m. USP1997045619642.
  10. Abraham Menachem (Lexington MA) Bartolini David (Dudley MA) Ben-Meir Samuel (Sharon MA) Carmi Ilan (Framingham MA) Cook ; III John L. (Southborough MA) Hart Ira (Cambridge MA) Herman Alex (Sharon MA). Generic backplane system which is configurable to serve different network access methods simultaneously. USP1996065530842.
  11. Corrigan Brian E. ; Rymph Alan D.. Inter-bus bridge circuit with integrated memory port. USP1999035881254.
  12. Esterberg, Dennis R; Dickie, James P. Interchangeable and configurable input/output module for a computing deviceco. USP2004046718408.
  13. Shek Edde Tang Tin ; Stubbs Robert E.. Interrupt mechanism on NorthBay. USP2001026185652.
  14. Chan Jong. Memory controller supporting redundant synchronous memories. USP2001066243829.
  15. Bashford, Patrick R.. Message signaled interrupt generating device and method. USP2003096629179.
  16. Gary William Batchelor ; Carl Evan Jones ; Forrest Lee Wade. Method and system for perfetching data in a bridge system. USP2002126502157.
  17. Pecone Victor Key ; Swanson Dwayne Howard. Modular bus bridge system compatible with multiple bus pin configurations. USP2000086098140.
  18. Jibbe Mahmoud K. (Wichita KS) McCombs Craig C. (Wichita KS) Thompson Kenneth J. (Wichita KS). Multiple configuration data path architecture for a disk array controller. USP1994095345565.
  19. Liron Moshe (Evanston IL). Peripheral unit controller. USP1984014428044.
  20. Lui Albert S. ; Naminski Ronald John ; Oliver James Wesley ; Aster Radek ; Wood Neill Preston. Raid system with fibre channel arbitrated loop. USP1998095812754.
  21. Young Paul R. (Cromwell CT) Solari Peter L. (Lebanon CT) Shumski Gregory J. (Colchester CT) So Yin Cheung (Fremont CA). Redundant array of solid state memory devices. USP1997105680579.
  22. Browne Hendrik A.. Secure computer system and method of providing secure access to a computer system including a stand alone switch operable to inhibit data corruption on a storage device. USP2001086272533.
  23. Steven L. Shrader ; Robert A. Rust. Storage management system and auto-RAID transaction manager for coherent memory map across hot plug interface. USP2002056397293.
  24. Phillip M. Jones ; Robert Allan Lester. System for identifying memory requests as noncacheable or reduce cache coherence directory lookups and bus snoops. USP2002106470429.
  25. Thornton,Barry. System of co-located computers in a framework including removable function modules for adding modular functionality. USP2006067069368.
  26. Christensen Steven G. (Minneapolis MN). TDM digital matrix intercom system. USP1996015483528.

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  3. Raghunathan, Sriram; Eng, Wing; Ramasamy, Karthikeyan. Extending standalone router syntax to multi-chassis routers. USP2009107606241.
  4. Raghunathan, Sriram; Eng, Wing; Ramasamy, Karthikeyan. Extending standalone router syntax to multi-chassis routers. USP2011108040902.
  5. Baxter, Glenn A.; Forsse, Brian L.. Graphical user interface (GUI) including input files with information that determines representation of subsequent content displayed by the GUI. USP2013078479124.
  6. Turner, Steve W.; Raghunathan, Sriram; DiNapoli, Jeffrey M.; Krishnaswamy, Umesh; Gupta, Anurag P.. Integration of an operative standalone router into a multi-chassis router. USP2009067552262.
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  10. Chadalavada, Bharani; Krishnaswamy, Umesh; Tuplur, Raj. Push-based hierarchical state propagation within a multi-chassis network device. USP2012048149691.
  11. Elliott, John C.; Kubo, Robert A.; Lucas, Gregg S.. RAID array data member copy offload in high density packaging. USP2010037673167.
  12. Lee, Sang-Geol. Redundant storage device, server system having the same, and operation method thereof. USP20190410255149.
  13. Eng, Wing; Mahajan, Pallavi; Shafer, Philip A.. Software installation in a multi-chassis network device. USP2010067747999.
  14. Eng, Wing; Mahajan, Pallavi; Shafer, Philip A.. Software installation in a multi-chassis network device. USP2013028370831.
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