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Process for the production of thin semiconductor material films 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/42
  • H01L-021/02
  • H01L-021/324
  • H01L-021/477
  • H01L-029/12
  • H01L-029/02
출원번호 US-0449786 (2003-05-30)
우선권정보 FR-91 11491(1991-09-18)
발명자 / 주소
  • Bruel,Michel
출원인 / 주소
  • Commissariat a l'energie Atomique
대리인 / 주소
    Brinks Hofer Gilson & Lione
인용정보 피인용 횟수 : 176  인용 특허 : 61

초록

초록이 없습니다.

대표청구항

대표청구항이 없습니다.

이 특허에 인용된 특허 (61)

  1. Pankove ; Jacques I., Apparatus and method for maskless ion implantation.
  2. Fournier Eugene (Garden City MI), Apparatus for microwave glow discharge deposition.
  3. Wallis ; George, Application of field-assisted bonding to the mass production of silicon type pressure transducers.
  4. Auton John P. (Huntingdon GB2), Blade shields.
  5. Parrillo Louis C. (Austin TX) Cosentino Stephen J. (Mesa AZ) Bergami Bridgette A. (Mesa AZ), CMOS process.
  6. Gorinas Guy (Annecy FR), Device for the rapid depositing of oxides in thin layers which adhere well to plastic supports.
  7. Moslehi Mehrdad M. (Dallas TX) Huang Steve S. (Dallas TX), Distributed ECR remote plasma processing and apparatus.
  8. Phillips Richard J. (Billerica MA) Glicksman Leon R. (Lynnfield MA) Larson Ralph (Bolton MA), Forced-convection, liquid-cooled, microchannel heat sinks.
  9. White Gerald W. (5835 Elm Lawn St. Dallas TX 75228), Gasless ion plating.
  10. White Gerald W. (Dallas TX) Volkers Jack C. (Elgin IL), Gasless ion plating process and apparatus.
  11. Pease Roger F. (Stanford CA) Tuckerman David B. (Stanford CA) Swanson Richard M. (Los Altos CA), Heat sink and method of attaching heat sink to a semiconductor integrated circuit and the like.
  12. Ellenberger Charles E. (Elko NV) Bower George L. (Elko NV) Snow William R. (Sunnyvale CA), Independently variably controlled pulsed R.F. plasma chemical vapor processing.
  13. King ; William J., Ion beam implantation-sputtering.
  14. Kanai Norio (Chofu JPX), Ion implanter.
  15. Cann Gordon L. (P.O. Box 279 Laguna Beach CA 92652), Magnetoplasmadynamic apparatus and process for the separation and deposition of materials.
  16. Gotou Hiroshi (Niiza JPX), Manufacturing method for semiconductor device.
  17. Rouse George V. (Indialantic FL) Reinecke Paul S. (Indialantic FL) McLachlan Craig J. (Melbourne Beach FL), Manufacturing ultra-thin wafer using a handle wafer.
  18. Conrad John R. (Madison WI), Method and apparatus for plasma source ion implantation.
  19. Ogle John S. (Milpitas CA), Method and apparatus for producing magnetically-coupled planar plasma.
  20. Wittmaack Klaus (Munich DEX), Method and apparatus for the quantitative, depth differential analysis of solid samples with the use of two ion beams.
  21. Berg ; Joseph E. ; Brown ; Jr. ; Randolph E., Method for depositing film on a substrate.
  22. Kamijo Hiroyuki (Yokohama JPX) Mikata Yuuichi (Kawasaki JPX), Method for manufacturing a semiconductor device and suppressing the generation of bulk microdefects near the substrate s.
  23. Hubler Graham K. (Alexandria VA) Donovan Edward P. (Annandale VA) Van Vechten Deborah (Baltimore MD), Method for producing substoichiometric silicon nitride of preselected proportions.
  24. Ito Tatsuo (Niigata JPX) Nakazato Yasuaki (Nagano JPX), Method for production of bonded wafer.
  25. Mizuno Bunji (Ikoma JPX) Kubota Masafumi (Osaka JPX), Method for removing impurities existing in semiconductor substrate.
  26. White Gerald W. (Dallas TX), Method for resisting galling.
  27. Kaufmann Helmut (Triesen LIX), Method of depositing hard wear-resistant coatings on substrates.
  28. Beitman Bruce A. (Palm Bay FL), Method of making dielectrically isolated integrated circuits using oxygen implantation and expitaxial growth.
  29. Brown Dale M. (Schenectady NY), Method of making integrated circuits.
  30. Brown Dale M. (Schenectady NY) Vosburgh Kirby G. (Schenectady NY), Method of making integrated circuits utilizing ion implantation and selective epitaxial growth.
  31. Li Jianming (Beijing CNX), Method of making silicon material with enhanced surface mobility by hydrogen ion implantation.
  32. Godbey David J. (Bethesda MD) Hughes Harold L. (West River MD) Kub Francis J. (Severna Park MD), Method of producing a thin silicon-on-insulator layer.
  33. Suzuki Yasuhiro (Fuchu JPX) Mori Sumio (Fuchu JPX) Fujiyama Eiji (Fuchu JPX) Sasaki Masami (Fuchu JPX), Microwave plasma treatment apparatus.
  34. Rough J. Kirkwood H. (264 S. 14th St. San Jose CA 95112) Rose Peter W. (1000 Almanor Ave. Menlo Park CA 94025), Multiple electrode plasma reactor power distribution system.
  35. Jackson Thomas M. (Bishops Stortford GB2) Heinecke Rudolf A. H. (Harlow GB2) Ojha Sureshchandra M. (Harlow GB2), Optical fibre manufacture.
  36. Popov Oleg A. (Franklin MA), Plasma generation in electron cyclotron resonance.
  37. Weiss Armin K. (Rochester NY) Clarke John R. (Rochester NY), Plasma plating.
  38. Barna Gabriel G. (Richardson TX) Ratliff Charles (Richardson TX), Process and apparatus for detecting aberrations in production process operations.
  39. Dolins Steven B. (Dallas TX) Srivastava Aditya (Richardson TX) Flinchbaugh Bruce E. (Dallas TX) Gunturi Sarma S. (Richardson TX) Lassiter Thomas W. (Garland TX) Love Robert L. (McKinney TX), Process and apparatus for detecting aberrations in production process operations.
  40. Bruel Michel (Veurey FRX) Soubie Alain (St. Egreve FRX) Spinelli Philippe (La Tronche FRX), Process and apparatus for implanting particles in a solid.
  41. Bruel, Michel, Process and apparatus for obtaining beams of particles with a spatially modulated density.
  42. Wilkes Donald F. (Albuquerque NM), Process for cleaving crystalline materials.
  43. Bruel Michel (Veurey FRX) Spinelli Philippe (La Tronche FRX), Process for doping semiconductors.
  44. Bruel Michel (Veurey-Voroize FRX) Floccari Michel (Grenoble FRX), Process for doping semiconductors.
  45. Kirkpatrick Allen R. (Lowell MA), Process for fabricating thin film and glass sheet laminate.
  46. Bruel Michel (Veurey FRX) du Port de Poncharra Jean (St. Martin-Le-Vinoux FRX), Process for producing an insulating layer buried in a semiconductor substrate by ion implantation.
  47. Kramler, Josef; Kuhn-Kuhnenfeld, Franz; Gerber, Hans-Adolf, Process for the manufacture of semiconductor wafers with a rear side having a gettering action.
  48. Margail Jacques (Grenoble FRX) Stoemenos John (Salonica GRX), Process for the production of an insulating layer embedded in a semiconductor substrate by ionic implantation and semico.
  49. Bruel Michel (Veurey FRX), Process for the production of thin semiconductor material films.
  50. Speri Roger (Conflans Sainte Honorine FRX), Process for thermochemical treatments of metals by ionic bombardment.
  51. Boulos Maher (Sherbrooke CAX) Jurewicz Jerzy (Sherbrooke CAX), Process of depositing particulate material on a substrate.
  52. Dautremont-Smith, William C.; Katz, Avishay; Koszi, Louis A.; Segner, Bryan P.; Thomas, Peter M., Rapid thermal processing method of making a semiconductor device.
  53. Parsons James D. (Newbury Park CA) Stafsudd Oscar (Los Angeles CA), Silicon carbide:metal carbide alloy semiconductor and method of making the same.
  54. Foerstner Juergen A. (Mesa AZ) Hughes Henry G. (Scottsdale AZ) D\Aragona Frank S. (Scottsdale AZ), Silicon film with improved thickness control.
  55. Drews Klaus (Halstenbek DT) Krumme Jens-Peter (Hamburg DT), Substrate holder for etching thin films.
  56. Heinecke Rudolf A. H. (Harlow GBX) Ojha Suresh M. (Harlow GBX) Llewellyn Ian P. (Harlow GBX), Surface treatment of plastics material.
  57. Bruel Michel (Veurey FRX) Escaron Jean (Sassenage FRX) Labartino Joseph (Voreppe FRX), Target holder with mechanical scanning.
  58. Altoz Frank E. (Baltimore MD) Porter Richard F. (Millersville MD), Thermal switch.
  59. Shyr Richard (Greenlawn NY), Wafer level process for fabricating passivated semiconductor devices.
  60. Yamaguchi Jun (Hyogo JPX) Shikatani Osamu (Hyogo JPX), Wafer of semiconductors.
  61. Ecer Gunes M. (Irvine CA) Wood Susan (Pittsburgh PA) Schreurs Jan J. (Plum Boro PA), Wear resistant steel articles with carbon, oxygen and nitrogen implanted in the surface thereof.

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  2. Matthews, Michael W; Phatak, Sunil B., Asymmetrical wafer configurations and method for creating the same.
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  5. Lee, Sang-Yun, Bonded semiconductor structure and method of making the same.
  6. Mazure, Carlos; Nguyen, Bich-Yen; Sadaka, Mariam, Bonded semiconductor structures and method of forming same.
  7. Sadaka, Mariam, Bonded semiconductor structures including two or more processed semiconductor structures carried by a common substrate.
  8. Zuniga, Steven M.; Tolles, Robert D.; Aqui, Derek G.; Nagengast, Andrew J.; Senn, Anthony J.; Guerrero, Keenan Leon, Bonding apparatus and method.
  9. Zuniga, Steven M.; Tolles, Robert D.; Aqui, Derek G.; Nagengast, Andrew J.; Senn, Anthony J.; Guerrero, Keenan Leon, Bonding apparatus and method.
  10. Zahurak, John K.; Tang, Sanh D.; Heineck, Lars P.; Roberts, Martin C.; Mueller, Wolfgang; Liu, Haitao, Circuit structures, memory circuitry, and methods.
  11. Blake, Julian G.; Murphy, Paul J., Cooled cleaving implant.
  12. Yamazaki, Shunpei, Display device and method for manufacturing the same.
  13. Yamazaki, Shunpei, Display device, method for manufacturing display device, and SOI substrate.
  14. Yamazaki, Shunpei, Display device, method for manufacturing display device, and SOI substrate.
  15. Tang, Sanh D.; Zahurak, John K.; Juengling, Werner, Floating body cell structures, devices including same, and methods for forming same.
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  17. Tang, Sanh D.; Zahurak, John K.; Juengling, Werner, Floating body cell structures, devices including same, and methods for forming same.
  18. Tang, Sanh D.; Zahurak, John K.; Juengling, Werner, Floating body cell structures, devices including same, and methods for forming same.
  19. Joly, Jean-Pierre; Ulmer, Laurent; Parat, Guy, Integrated circuit on high performance chip.
  20. Sandhu, Gurtej S.; Parat, Krishna K., Integrated circuit structures, semiconductor structures, and semiconductor die.
  21. Sadaka, Mariam, Interposers including fluidic microchannels and related structures and methods.
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  23. Koyama, Masaki; Momo, Junpei; Higa, Eiji; Honda, Hiroaki; Moriwaka, Tamae; Shimomura, Akihisa, Manufacturing method of SOI semiconductor device.
  24. Moriwaka, Tomoaki, Manufacturing method of SOI substrate.
  25. Ohnuma, Hideto, Manufacturing method of SOI substrate.
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  29. Tanaka, Koichiro, Manufacturing method of semiconductor substrate.
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  35. Werkhoven, Christiaan J.; Arena, Chantal, Metallic carrier for layer transfer and methods for forming the same.
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  37. Bruel, Michel, Method and device for fabricating a layer in semiconductor material.
  38. Sandhu, Gurtej S., Method and structure for integrating capacitor-less memory cell with logic.
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  41. Matthews, Michael W.; Phatak, Sunil B., Method for creating asymmetrical wafer.
  42. Nguyen, Bich-Yen; Schwarzenbach, Walter; Maleville, Christophe, Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers.
  43. Nguyen, Bich-Yen; Schwarzenbach, Walter; Maleville, Christophe, Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers.
  44. Nguyen, Bich-Yen; Sadaka, Mariam; Maleville, Christophe, Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures.
  45. Nguyen, Bich-Yen; Sadaka, Mariam; Maleville, Christophe, Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures.
  46. Nguyen, Bich-Yen; Sadaka, Mariam; Maleville, Christophe, Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures.
  47. Sadaka, Mariam; Nguyen, Bich-Yen; Radu, Ionut, Method for fabricating semiconductor structures including transistor channels having different strain states, and related semiconductor structures.
  48. Komatsu, Yoshihiro; Moriwaka, Tomoaki; Takahashi, Kojiro, Method for forming SOI substrate and apparatus for forming the same.
  49. Fournel, Franck; Moriceau, Hubert; Lagahe, Christelle, Method for making a stressed structure designed to be dissociated.
  50. Deguet, Chrystel; Clavelier, Laurent, Method for making a thin-film element.
  51. Koezuka, Junichi; Ohnuma, Hideto, Method for manufacturing SOI substrate.
  52. Ohnuma, Hideto; Shingu, Takashi; Kakehata, Tetsuya; Kuriki, Kazutaka; Yamazaki, Shunpei, Method for manufacturing SOI substrate.
  53. Ohnuma, Hideto; Yamazaki, Shunpei, Method for manufacturing SOI substrate.
  54. Shimomura, Akihisa; Ohnuma, Hideto; Momo, Junpei; Yamazaki, Shunpei, Method for manufacturing SOI substrate.
  55. Shimomura, Akihisa; Tokunaga, Hajime, Method for manufacturing SOI substrate.
  56. Yamazaki, Shunpei; Nishida, Eriko, Method for manufacturing SOI substrate and method for manufacturing semiconductor device.
  57. Yamazaki, Shunpei; Nishida, Eriko; Shimazu, Takashi, Method for manufacturing SOI substrate and method for manufacturing semiconductor device.
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  60. Yamazaki, Shunpei; Nishida, Eriko; Shimazu, Takashi, Method for manufacturing SOI substrate in which crystal defects of a single crystal semiconductor layer are reduced and method for manufacturing semiconductor device.
  61. Tanaka, Koichiro, Method for manufacturing a SOI with plurality of single crystal substrates.
  62. Shimomura, Akihisa; Tsukamoto, Naoki, Method for manufacturing a semiconductor substrate by laser irradiation.
  63. Akiyama, Shoji, Method for manufacturing bonded wafer.
  64. Yamazaki, Shunpei; Arai, Yasuyuki, Method for manufacturing semiconductor device.
  65. Yamazaki, Shunpei; Momo, Junpei; Isaka, Fumito; Higa, Eiji; Koyama, Masaki; Shimomura, Akihisa, Method for manufacturing semiconductor device.
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  67. Yamazaki, Shunpei, Method for manufacturing semiconductor substrate.
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  72. Yamazaki, Shunpei, Method for manufacturing semiconductor substrate and semiconductor device.
  73. Yamazaki, Shunpei; Ohnuma, Hideto; Koyama, Jun, Method for manufacturing semiconductor substrate, display panel, and display device.
  74. Tauzin, Aurélie; Dechamp, Jérôme; Mazen, Frédéric; Madeira, Florence, Method for preparing thin GaN layers by implantation and recycling of a starting substrate.
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  76. Dross, Frederic; Van Kerschaver, Emmanuel; Beaucarne, Guy, Method for the production of thin layer of silicon by utilization of mismatch in coefficient of thermal expansion between screen printed metal layer and silicon mother substrate.
  77. Dross, Frédéric; Van Kerschaver, Emmanuel; Beaucarne, Guy, Method for the production of thin substrates.
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  90. Yamazaki, Shunpei, Method of manufacturing a semiconductor device including thermal oxidation to form an insulating film.
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  96. Sadaka, Mariam; Aspar, Bernard; Blanchard, Chrystelle Lagahe, Methods for fabrication of semiconductor structures using laser lift-off process, and related semiconductor structures.
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  101. Letertre, Fabrice, Methods of fabricating semiconductor structures and devices with strained semiconductor material.
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  105. Sadaka, Mariam, Methods of forming III-V semiconductor structures using multiple substrates, and semiconductor devices fabricated using such methods.
  106. Nguyen, Bich-Yen; Sadaka, Mariam, Methods of forming bonded semiconductor structures including interconnect layers having one or more of electrical, optical, and fluidic interconnects therein, and bonded semiconductor structures formed using such methods.
  107. Sadaka, Mariam, Methods of forming bonded semiconductor structures including two or more processed semiconductor structures carried by a common substrate, and semiconductor structures formed by such methods.
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  115. Sadaka, Mariam; Aspar, Bernard; Blanchard, Chrystelle Lagahe, Methods of forming semiconductor structures including MEMS devices and integrated circuits on opposing sides of substrates, and related structures and devices.
  116. Nguyen, Bich-Yen; Sadaka, Mariam, Methods of forming three dimensionally integrated semiconductor systems including photoactive devices and semiconductor-on-insulator substrates.
  117. Nguyen, Bich-Yen; Sadaka, Mariam, Methods of forming three-dimensionally integrated semiconductor systems including photoactive devices and semiconductor-on-insulator substrates.
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  119. Sadaka, Mariam; Radu, Ionut, Methods of transferring layers of material in 3D integration processes and related structures and devices.
  120. Tang, Sanh D.; Zahurak, John K., Methods, structures and devices for increasing memory density.
  121. Tang, Sanh D.; Zahurak, John K., Methods, structures and devices for increasing memory density.
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