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Strained gettering layers for semiconductor processes 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/8238
  • H01L-021/70
  • H01L-021/322
  • H01L-021/02
출원번호 US-0956481 (2004-10-01)
발명자 / 주소
  • Fitzgerald,Eugene A.
  • Pitera,Arthur J.
출원인 / 주소
  • Massachusetts Institute of Technology
대리인 / 주소
    Wolf, Greenfield & Sacks, P.C.
인용정보 피인용 횟수 : 46  인용 특허 : 23

초록

초록이 없습니다.

대표청구항

대표청구항이 없습니다.

이 특허에 인용된 특허 (23)

  1. Francois J. Henley ; Michael A. Brayan ; William G. En, Cleaving process to fabricate multilayered substrates using low implantation doses.
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  2. Francois J. Henley ; Nathan W. Cheung, Controlled cleavage thin film separation process using a reusable substrate.
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  3. Henley, Francois J.; Cheung, Nathan W., Controlled cleaving process.
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  4. Wang,Chia Gee; Tsu,Raphael; Lofgren,John Clay, Epitaxial SiObarrier/insulation layer.
    상세보기
  5. Kub Francis J. ; Hobart Karl D., Fabrication ultra-thin bonded semiconductor layers.
    상세보기
  6. Buller, James F.; Wristers, Derick J.; Wu, David; Sultan, Akif, Formation of ultra-shallow depth source/drain extensions for MOS transistors.
    상세보기
  7. Nathan W. Cheung ; Francois J. Henley, Generic layer transfer methodology by controlled cleavage process.
    상세보기
  8. Henley Francois J. ; Cheung Nathan W., Gettering technique for silicon-on-insulator wafers.
    상세보기
  9. Henley, Francois J.; Cheung, Nathan W., Gettering technique for wafers made using a controlled cleaving process.
    상세보기
  10. Henley, Francois J.; Cheung, Nathan W., Gettering technique for wafers made using a controlled cleaving process.
    상세보기
  11. Francois J. Henley ; Michael A. Bryan ; William G. En, High temperature implant apparatus.
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  12. Carr, William; Usenko, Alexander, Method of manufacture of a multi-layered substrate with a thin single crystalline layer and a versatile sacrificial layer.
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  13. Nakamura, Osamu; Katsumura, Manabu; Yamazaki, Shunpei, Method of manufacturing a semiconductor device.
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  14. Takamizawa Shoichi,JPX ; Kobayashi Norihiro,JPX, Method of manufacturing mirror-polished silicon wafers, and apparatus for processing silicon wafers.
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  15. Aspar,Bernard; Bruel,Michel; Poumeyrol,Thierry, Method of producing a thin layer of semiconductor material.
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  16. Henley Francois J. ; Cheung Nathan W., Pre-semiconductor process implant and post-process film separation.
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  17. Alexander Yuri Usenko, Process for lift-off of a layer from a substrate.
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  18. Bruel Michel,FRX, Process for the manufacture of thin films of semiconductor material.
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  19. Bruel Michel (Veurey FRX), Process for the production of thin semiconductor material films.
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  20. Ariyoshi Hisashi (Tokyo JPX) Kasanami Toru (Kyoto JPX) Fukuda Susumu (Osaka JPX), Producing a compound semiconductor device on an oxygen implanted silicon substrate.
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  21. Forbes,Leonard, Silicon oxycarbide substrates for bonded silicon on insulator.
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  22. Srikrishnan Kris V., Smart-cut process for the production of thin semiconductor material films.
    상세보기
  23. Cohen, Guy Moshe; Christiansen, Silke Hildegard, Strained silicon-on-insulator (SSOI) and method to form the same.
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  1. Yu, Tien-Wei; Chien, Chin-Cheng; Lai, I-Ming; Chen, Shin-Chi; Li, Chih-Yueh; Chuang, Fong-Lung; Liao, Chin-I; Lin, Kuan-Yu, Compound semiconductor epitaxial structure and method for fabricating the same.
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  2. Fu, Ssu-I; Hung, Yu-Hsiang; Chen, Cheng-Guo; Chang, Chung-Fu; Lin, Chien-Ting, Epitaxial Process of forming stress inducing epitaxial layers in source and drain regions of PMOS and NMOS structures.
    상세보기
  3. Lai, Szu-Hao; Wu, Chun-Yuan; Chien, Chin-Cheng; Yu, Tien-Wei; Chang, Ming-Hua; Lin, Yu-Shu; Wen, Tsai-Yu; Hsu, Hsin-Kuo, Epitaxial process.
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  4. Liang, Chia-Jui; Tsao, Po-Chao, Epitaxial process.
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  5. Lee, Junedong; Sadana, Devendra K.; Schepis, Dominic J., Fabrication of SOI with gettering layer.
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  6. Hung, Yu-Hsiang; Fu, Ssu-I; Lin, Chien-Ting; Tsao, Po-Chao; Chang, Chung-Fu; Chen, Cheng-Guo, Fin-shaped field-effect transistor (FinFET).
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  7. Liao, Chin-I; Chien, Chin-Cheng, Gradient dopant of strained substrate manufacturing method of semiconductor device.
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  8. Yeh, Chiu-Hsien; Chien, Chin-Cheng; Wang, Yu-Wen, Manufacturing method for semiconductor structure.
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  9. Tsai, Shih-Hung; Chiang, Wen-Tai; Tsai, Chen-Hua; Tsai, Cheng-Tzung, Metal-gate CMOS device.
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  10. Tsai, Shih-Hung; Chiang, Wen-Tai; Tsai, Chen-Hua; Tsai, Cheng-Tzung, Metal-gate CMOS device and fabrication method thereof.
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  11. Hung, Ching-Wen; Wu, Jia-Rong; Huang, Chih-Sen, Method for fabricating fin-shaped field-effect transistor.
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  12. Liao, Chin-I; Lai, I-Ming; Chien, Chin-Cheng, Method for fabricating first and second epitaxial cap layers.
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  13. Huang, Shin-Chuan; Hwang, Guang-Yaw; Wang, Hsiang-Ying; Hung, Yu-Hsiang; Wang, I-Chang, Method for fabricating semiconductor device.
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  14. Hsu, Ching-Pin; Lin, Yi-Po; Liao, Jiunn-Hsiung; Chen, Chieh-Te; Chang, Feng-Yi; Tsai, Shang-Yuan; Chen, Li-Chiang, Method for forming void-free dielectric layer.
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  15. Baillin, Xavier, Method for the production of a substrate comprising embedded layers of getter material.
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  16. Liu, Chia-Jong; Wu, Yen-Liang; Chang, Chung-Fu; Hung, Yu-Hsiang; Chou, Pei-Yu; Cheng, Home-Been, Method of controlling etching process for forming epitaxial structure.
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  17. Guo, Ted Ming-Lang; Chien, Chin-Cheng; Chan, Shu-Yen; Yang, Chan-Lon; Wu, Chun-Yuan, Method of fabricating a semiconductor structure.
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  18. Lu, Tsuo-Wen; Lai, I-Ming; Hou, Tsung-Yu; Lin, Chien-Liang; Teng, Wen-Yi; Wang, Shao-Wei; Wang, Yu-Ren; Chien, Chin-Cheng, Method of fabricating an epitaxial layer.
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  21. Yang, Chan-Lon; Guo, Ted Ming-Lang; Liao, Chin-I; Chien, Chin-Cheng; Chan, Shu-Yen; Wu, Chun-Yuan, Method of making strained silicon channel semiconductor structure.
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  22. Aulnette,C��cile; Figuet,Christophe; Daval,Nicolas, Method of manufacturing a semiconductor heterostructure.
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  23. Liao, Chin-I; Hsu, Chia-Lin; Li, Ming-Yen; Hsieh, Yung-Lun; Chen, Chien-Hao; Lee, Bo-Syuan, Multi-gate field-effect transistor and process thereof.
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  24. Liao, Chin-I; Hsu, Chia-Lin; Li, Ming-Yen; Hsieh, Yung-Lun; Chen, Chien-Hao; Lee, Bo-Syuan, Multi-gate field-effect transistor process.
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  25. Liao, Chin-I; Jiang, Ching-Hong; Li, Ching-I; Chan, Shu-Yen; Chien, Chin-Cheng, Process for manufacturing stress-providing structure and semiconductor device with such stress-providing structure.
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  26. Takizawa, Ritsuo, SOI substrate and method for producing the same, solid-state image pickup device and method for producing the same, and image pickup apparatus.
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  27. Chou, Ling-Chun; Wang, I-Chang; Hung, Ching-Wen, Semiconductor device and manufacturing method thereof.
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  29. Hou, Hsin-Ming; Tung, Yu-Cheng; Kung, Ji-Fu; Lien, Wai-Yi; Chen, Ming-Tsung, Semiconductor device and method for fabricating the same.
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  30. Liao, Chin-I; Hsuan, Teng-Chun; Chien, Chin-Cheng, Semiconductor device and method of forming epitaxial layer.
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  31. Liao, Chin-I; Hsuan, Teng-Chun; Chien, Chin-Cheng, Semiconductor device having epitaxial layer.
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  32. Liao, Chin-I; Hsuan, Teng-Chun; Lai, I-Ming; Chien, Chin-Cheng, Semiconductor device having epitaxial structures.
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  34. Tung, Yu-Cheng, Semiconductor devices.
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  35. Liao, Chin-I; Hsu, Chia-Lin; Li, Ming-Yen; Wu, Hsin-Huei; Hsieh, Yung-Lun; Chen, Chien-Hao; Lee, Bo-Syuan, Semiconductor process.
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  36. Tsai, Tzung-I; Lu, Shui-Yen, Semiconductor process.
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  37. Tsai, Zen-Jay; Hsu, Shao-Hua; Pai, Chi-Horn; Chou, Ying-Hung; Su, Shih-Hao; Hsu, Shih-Chieh; Wang, Chih-Ho; Wu, Hung-Yi; Lu, Shui-Yen, Semiconductor process.
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  38. Chang, Ming-Hua; Wu, Chun-Yuan; Chien, Chin-Cheng; Yu, Tien-Wei; Lin, Yu-Shu; Lai, Szu-Hao, Semiconductor process for modifying shape of recess.
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  39. Chang, Ming-Hua; Wu, Chun-Yuan; Chien, Chin-Cheng; Yu, Tien-Wei; Lin, Yu-Shu; Lai, Szu-Hao, Semiconductor process for modifying shape of recess.
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  40. Liao, Chin-I; Chien, Chin-Cheng, Semiconductor structure.
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  41. Wei, Ming-Te; Huang, Shin-Chuan; Hung, Yu-Hsiang; Tsao, Po-Chao; Liang, Chia-Jui; Chen, Ming-Tsung; Liang, Chia-Wen, Semiconductor structure and fabrication method thereof.
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  42. Wei, Ming-Te; Huang, Shin-Chuan; Hung, Yu-Hsiang; Tsao, Po-Chao; Liang, Chia-Jui; Chen, Ming-Tsung; Liang, Chia-Wen, Semiconductor structure and fabrication method thereof.
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  43. Liao, Chin-I; Chien, Chin-Cheng, Semiconductor structure and process thereof.
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  44. Cherekdjian, Sarko, Semiconductor structure made using improved multiple ion implantation process.
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  45. Chou, Ling-Chun; Wang, I-Chang; Hung, Ching-Wen, Spacer scheme for semiconductor device.
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  46. Yang, Chan-Lon; Guo, Ted Ming-Lang; Liao, Chin-I; Chien, Chin-Cheng; Chan, Shu-Yen; Wu, Chun-Yuan, Strained silicon channel semiconductor structure.
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