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DSO timing source transient compensation 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H04J-003/06
출원번호 US-0122461 (2002-04-15)
발명자 / 주소
  • Marcoux,Matthew J.
  • Gammenthaler, Jr.,Robert S.
출원인 / 주소
  • Alcatel
대리인 / 주소
    Danamraj & Youst
인용정보 피인용 횟수 : 0  인용 특허 : 39

초록

초록이 없습니다.

대표청구항

대표청구항이 없습니다.

이 특허에 인용된 특허 (39)

  1. Grimwood Michael ; Knittel Jim ; Richardson Paul ; Rakib Selim Shlomo ; Lind Paul Alan ; Artman Doug, Apparatus and method for synchronizing an SCDMA upstream or any other type upstream to an MCNS downstream or any other type downstream with a different clock rate than the upstream.
  2. Madonna Robert P., Bridge for expandable telecommunications system.
  3. Toth Robert James, Channel bank with individually removable processorless U-BRITE cards controlled by bank controller card.
  4. Aro Enn (Delaware OH) Bogan Leonard E. (Columbus OH) Hamersley Richard A. (Columbus OH) Knapke Paul H. (Columbus OH) Miller Robert L. (Westerville OH), Circuit for interfacing a processor to a line circuit.
  5. Bedell Daniel J. ; Miller Charles A., Clock signal deskewing system.
  6. Chow Henry,CAX ; Gassewitz Michael,CAX ; Ghadbane Jim,CAX ; Mitchell Charles,CAX ; Bisson Germain,CAX ; Bews Steve,CAX, Communications system for receiving and transmitting data cells.
  7. Chow Henry,CAX ; Gassewitz Michael,CAX ; Ghadbane Jim,CAX ; Mitchell Charles,CAX ; Bisson Germain,CAX ; Bews Steve,CAX, Communications system for receiving and transmitting data cells.
  8. Diaz Felix V. (Plano TX) Hogg Raymond L. (Carrollton TX) Raz Daniel J. (Plano TX) Thompson Kathy A. (Garland TX) Langdon Gregory L. (Addison TX) Brewer W. Keith (Richardson TX), Data formats for telecommunications networks.
  9. Le Bao G. ; Nguyen Derek T. ; Luong Lisa, Device retention assembly.
  10. Raji Alexander David ; Allen James Glen ; Henion Scott Gregory, Digital dictation system having a central station that includes component cards for interfacing to dictation stations an.
  11. Baxter Leslie A. (Eatontown NJ) Berkowitz Paul R. (Red Bank NJ) Buzzard Clair A. (Lincroft NJ), Distributed digital conferencing system.
  12. James W. Ivey, Jr. ; Keith Bass, Electrically shielded connector with over-molded insulating cover.
  13. Lau Gustavo ; Ahmed Zaheer ; Khelghatti Hojat, Employing feedback data and congestion ranking to minimize contention delay in a multi-slot Mac protocol.
  14. Young James Patrick ; Clevenger Donald Lee, Enclosure for removable computer peripheral equipment.
  15. Chin Howey Q. ; Chan Kurt, Hierarchical storage management from a mirrored file system on a storage network segmented by a bridge.
  16. Nomura Masahiro (Tokyo JPX), High frequency clock signal distribution circuit with reduced clock skew.
  17. Wilson Dennis L. (Palo Alto CA) O\Connor Patrick W. (Sunnyvale CA), High performance image storage and distribution apparatus having computer bus, high speed bus, ethernet interface, FDDI.
  18. Le Gallo Rmy (Le Chesnay FRX) Lyvet Grard (Les Clayes Sous Bois FRX) Malgogne Bernard (Dreux FRX), Host structure for terminal adapters.
  19. Charles W. Frank, Jr. ; Thomas D. Hanan ; Wally Szeremeta, Integrated computer module.
  20. Kennedy Barry (Santa Ana CA) Welch Randall S. (Lake Forest CA), Live data storage array system having individually removable, and self-configuring data storage units.
  21. McGrew, Michael Arthur, Message transfer part level three alias point codes.
  22. Bedrosian Paul Stephan, Method and apparatus for a hitless switch-over between redundant signals.
  23. Jorge E. Lach, Method and apparatus for adding and removing components without powering down computer system.
  24. Virdee Harbhajan S. ; Kaplan Thomas M., Method and apparatus for facilitating an interface to a digital signal processor.
  25. Cordell Robert R. (Middletown NJ), Method and system for routing cells in an ATM switch.
  26. Meki Seiji,JPX ; Yamada Shunji,JPX ; Moriyama Junichi,JPX, Method of synchronization status message processing in transmission apparatus.
  27. Hunt Tom ; Hall Raymond William ; Ratter David Thomas, Modular disk memory apparatus with high transfer rate.
  28. Kuchta Douglas Allan ; LaPree Scott Raymond ; Severson Paul Steven ; Thomford Paul Jon, Multi-part concurrently maintainable electronic circuit card assembly.
  29. Katzman James A. (San Jose CA) Bartlett Joel F. (Palo Alto CA) Bixler Richard M. (Sunnyvale CA) Davidow William H. (Atherton CA) Despotakis John A. (Pleasanton CA) Graziano Peter J. (Los Altos CA) Gr, Multiprocessor system.
  30. Blackburn Bracey J. ; Gammenthaler ; Jr. Robert S. ; Hay Donald B. ; Cooper Thomas E. ; Fourcand Serge F. ; Vo Long V., OC3 delivery unit; bus control module.
  31. Cummings David C. ; Jones Alan A., OC3 delivery unit; common controller for application modules.
  32. Tong, Ernest Henry; Hanumalagutti, Prasad Dev, Paint booth air detection system.
  33. Muntz Gary S. ; Jacobs Steven E., SRTS clock recovery system implementing adaptive clock recovery techniques.
  34. Hershey Paul C. ; Gritton Charles W. K. ; Noel Jeffrey A., System and associated method for the synchronization and control of multiplexed payloads over a telecommunications network.
  35. Muntz Gary S. ; Jacobs Steven E. ; Fedorkow Guy, System and method for maintaining network synchronization utilizing digital phase comparison techniques with synchronous.
  36. Gallick Robert Lawrence ; Spenik John Wesley, System for providing bridging of backplane.
  37. Taylor Clement G. ; Chin Danny ; Lerman Jesse S. ; Zack Steven ; Ashley William, Tightly-coupled disk-to-CPU storage server.
  38. Pfahler, Jürgen; Jentsch, Peter, Time-alignment apparatus and method for time-aligning data frames of a plurality of channels in a telecommunication system.
  39. Ronald Pasqualini, Zero hold time circuit for high speed bus applications.
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