이 특허에 인용된 특허 (39)

1. Jost Stephen (Trbbach CHX) Senn Leonhard (Mauren LIX), Apparatus for producing a protective coating on substrates.

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2. Chu Jack O. (Long Island City NY) Hsu Louis L. (New York NY) Mii Toshio (Essex Junction VT) Shepard Joseph F. (Hopewell Junction NY) Stiffler Scott R. (Brooklyn NY) Tejwani Manu J. (Yorktown Heights , Capacitors with roughened single crystal plates.

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3. Gleason Karen K. ; Limb Scott J.H. ; Gleason Edward F. ; Sawin Herbert H. ; Edell David J., Chemical vapor deposition of fluorocarbon polymer thin films.

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4. Kluth, George Jonathan, Deeply doped source/drains for reduction of silicide/silicon interface roughness.

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5. Chua Hua-Thye (Los Altos CA) Chan Andrew K. (Palo Alto CA) Birkner John M. (Portola Valley CA) Whitten Ralph G. (San Jose CA) Bechtel Richard L. (Sunnyvale CA) Thomas Mammen (San Jose CA), Electrically programmable interconnect structure having a PECVD amorphous silicon element.

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6. Jang Syun-Ming,TWX ; Chang Chung-Long,TWX ; Jeng Shwangming,TWX ; Yu Chen-Hua,TWX, Etchback method for forming microelectronic layer with enhanced surface smoothness.

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7. Sandhu Gurtej S. ; Rolfson J. Brett, Integrated capacitor bottom electrode for use with conformal dielectric.

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8. Yew Tri-Rung,TWX ; Lur Water,TWX ; Sun Shih-Wei,TWX, Method for growing hemispherical grain silicon.

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9. Figura Thomas A. (Boise ID), Method for increasing capacitance of an HSG rugged capacitor using a phosphine rich oxidation and subsequent wet etch.

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10. Schuegraf Klaus F. ; Fazan Pierre C., Method of deposting uniform dielectric film deposition on textured surfaces.

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11. Huang Hsiu-Wen,TWX, Method of forming a rugged polysilicon fin structure in DRAM.

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12. Weimer Ronald A. (Boise ID) Kepten Avishai (Beit H\Cerem ILX) Sendler Michael (Migdal Ha\emek ILX), Method of forming polysilicon having a desired surface roughness.

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13. Mathews Viju (Boise ID) Turner Charles (Boise ID), Method of increasing capacitance of polycrystalline silicon devices by surface roughening and polycrystalline silicon de.

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14. Hirota Toshiyuki (Tokyo JPX) Honma Ichirou (Tokyo JPX) Watanabe Hirohito (Tokyo JPX) Zenke Masanobu (Tokyo JPX), Method of making a semiconductor integrated circuit device having a capacitor with a porous surface of an electrode.

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15. Jun Young-Kwon (Seoul KRX), Method of making memory cell capacitor.

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16. Sekine Makoto (Tokyo JPX) Kamiyama Satoshi (Tokyo JPX), Method of manufacturing a semiconductor device.

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17. Sandhu Gurtej S. ; Doan Trung T., Method of producing rough polysilicon by the use of pulsed plasma chemical vapor deposition and products produced by sa.

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18. Sandhu Gurtej S. ; Doan Trung T., Method of producing rough polysilicon by the use of pulsed plasma chemical vapor deposition and products produced by same.

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19. Gurtej S. Sandhu ; Trung T. Doan, Method of producing rough polysilicon by the use of pulsed plasma chemical vapor deposition and products produced by the same.

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20. Sandhu, Gurtej S.; Doan, Trung T., Method of producing rough polysilicon by the use of pulsed plasma chemical vapor deposition and products produced by the same.

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21. Sandhu, Gurtej S.; Doan, Trung T., Method of providing a silicon film having a roughened outer surface.

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22. Schuegraf Klaus F. ; Fazan Pierre C. ; Figura Thomas A., Method of selective texfturing for patterned polysilicon electrodes.

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23. Bennett Reid S. (Wappingers Falls NY) Ellingboe Albert R. (Palo Alto CA) Gifford George G. (Croton-on-Hudson NY) Haller Kurt L. (Peekskill NY) McKillop John S. (Satellite Beach FL) Selwyn Gary S. (Ho, Methods and apparatus for contamination control in plasma processing.

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24. Garo Derderian ; Vishnu K. Agarwal, Methods for forming rough ruthenium-containing layers and structures/methods using same.

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25. Tuttle Mark E. (Boise ID), Methods for texturizing polysilicon.

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26. Tuttle Mark E. (Boise ID), Methods for texturizing polysilicon utilizing gas phase nucleation.

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27. Saitoh Kimihiko (Kanagawa-ken JPX) Ishiguro Nobuyuki (Kanagawa-ken JPX) Sadamoto Mitsuru (Kanagawa-ken JPX) Fukuda Shin (Kanagawa-ken JPX) Ashida Yoshinori (Kanagawa-ken JPX) Fukuda Nobuhiro (Kanagaw, Process for forming a thin microcrystalline silicon semiconductor film.

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28. Lou Chine-Gie (Hsinchu TWX), Process for producing a stacked capacitor having polysilicon with optimum hemispherical grains.

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29. Kawakami Soichiro (Hikone) Kanai Masahiro (Tokyo) Aoki Takeshi (Machida JPX), Process for the formation of a polycrystalline semiconductor film by microwave plasma chemical vapor deposition method.

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30. Jost Stephen (Trbbach CHX) Senn Leonhard (Mauren LIX), Protective coating on substrates.

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31. Batey John (Danbury CT) Boland John J. (Stormville NY) Parsons Gregory N. (Tarrytown NY), Pulsed gas plasma-enhanced chemical vapor deposition of silicon.

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32. Heinecke Rudolf A. (Essex GB3) Ojha Sureshchandra M. (Essex GB3) Llewellyn Ian P. (Essex GB3), Pulsed plasma apparatus and process.

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33. Sandhu Gurtej S. (Boise ID) Doan Trung T. (Boise ID), Pulsed plasma enhanced CVD of metal silicide conductive films such as TiSi₂.

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34. Heinecke Rudolf A. H. (Harlow GB2) Ojha Suresh M. (Harlow GB2) Llewellyn Ian P. (Harlow GB2), Pulsed plasma process for treating a substrate.

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35. Er-Xuan Ping ; Ying Huang, Reduction of shorts among electrical cells formed on a semiconductor substrate.

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36. Huang Heng-Sheng,TWX, Rugged polysilicon process for DRAM capacitors.

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37. Zahurak John K. (Boise ID) Schuegraf Klaus F. (Boise ID) Thakur Randhir P. S. (Boise ID), Semiconductor processing method of providing a conductively doped layer of hemispherical grain polysilicon.

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38. Lee Ruojia (Boise ID) Gonzalez Fernando (Boise ID), Stacked capacitor doping technique making use of rugged polysilicon.

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39. Schuegraf Klaus F. ; Fazan Pierre C., Uniform dielectric film deposition on textured surfaces.

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