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Method for fabricating semiconductor package with multi-layer metal bumps 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/50
  • H01L-021/02
  • H01L-021/44
출원번호 US-0867530 (2004-06-14)
등록번호 US-7253022 (2007-08-07)
발명자 / 주소
  • 'Khng,Victor Tan Cher
  • Chai,Lee Kian
출원인 / 주소
  • Micron Technology, Inc.
인용정보 피인용 횟수 : 3  인용 특허 : 30

초록

A semiconductor package includes a substrate formed of a board material, a semiconductor die bonded to the substrate, and an encapsulant on the die. The package also includes an array of external contacts formed as multi layered metal bumps that include a base layer, a bump layer, and a non-oxidizin

대표청구항

What is claimed is: 1. A method for fabricating a semiconductor package comprising: providing a substrate having a first side and an opposing second side; forming a plurality of first bonding sites on the first side and a plurality of second bonding sites on the second side at a same time; depositi

이 특허에 인용된 특허 (30)

  1. Donald C. Abbott ; Douglas W. Romm, Composite connection structure and method of manufacturing.
  2. Laine Eric H. (Binghamton NY) Wilson James W. (Vestal NY), Electronic package.
  3. Hino Atsushi,JPX ; Naito Toshiki,JPX ; Sugimoto Masakazu,JPX, Film carrier and semiconductor device using same.
  4. Takayama Yoshinari,JPX ; Ouchi Kazuo,JPX ; Hino Atsushi,JPX, Film carrier and semiconductor device using same.
  5. Takayama Yoshinari,JPX ; Ouchi Kazuo,JPX ; Hino Atsushi,JPX, Film carrier for fine-pitched and high density mounting and semiconductor device using same.
  6. Ouchi Kazuo,JPX ; Morita Shoji,JPX ; Hino Atsushi,JPX ; Sugimoto Masakazu,JPX, Film carrier, semiconductor device using same and method for mounting semiconductor element.
  7. Donald C. Abbott ; Raymond A. Frechette ; Robert Sabo ; Steve Smith ; Christopher Sullivan ; David West, Flex circuit substrate for an integrated circuit package.
  8. Brownfield, Terri J., Flip chip carrier package with adapted landing pads.
  9. Salman Akram ; Larry Kinsman, Heat sink chip package.
  10. Akram Salman ; Kinsman Larry, Heat sink chip package and method of making.
  11. Glenn, Thomas P.; Anderson, Steven M.; Webster, Steven, Integrated circuit package having posts for connection to other packages and substrates.
  12. Farnworth Warren M. ; Gochnour Derek ; Akram Salman, Interconnect having recessed contact members with penetrating blades for testing semiconductor dice and packages with co.
  13. Kresge John S. ; Susko Robin A. ; Wilson James W., Method and apparatus for flexibly connecting electronic devices.
  14. Jiang Tongbi ; Schrock Edward, Method for fabricating BGA package using substrate with patterned solder mask open in die attach area.
  15. Hatada Kenzo (Katano JPX) Kitahiro Isamu (Yawata JPX), Method of connecting metal leads with electrodes of semiconductor device and metal lead therefore.
  16. Higdon William David ; Stepniak Frank ; Yeh Shing, Method of solder bumping a circuit component.
  17. Asai, Motoo; Kariya, Takashi, Multilayer printed-circuit board and semiconductor device.
  18. Nakamura Yoshifumi,JPX ; Itagaki Minehiro,JPX ; Takezawa Hiroaki,JPX ; Bessho Yoshihiro,JPX ; Shiraishi Tsukasa,JPX, Printed-circuit board having projection electrodes and method for producing the same.
  19. Patrick W. Tandy, Selectively coating bond pads.
  20. Masaru Nukiwa JP; Makoto Iijima JP; Seiji Ueno JP; Muneharu Morioka JP, Semiconductor device and method of producing the same.
  21. Higgins ; III Leo M. (Austin TX), Semiconductor device having compliant columnar electrical connections.
  22. Hiroshi Oka JP; Masaaki Hiromitsu JP, Semiconductor device of stacked chips.
  23. Hanaoka, Terunao; Wada, Kenji, Semiconductor device, method of fabricating the same, stack-type semiconductor device, circuit board and electronic instrument.
  24. Ommen Denise M. (Phoenix AZ) Tsai Chi-Taou (Chandler AZ) Baird John (Scottsdale AZ), Semiconductor package capable of spreading heat.
  25. Kouichi Teshima JP; Emiko Higashinakagawa JP; Shinji Arai JP, Solder alloy and bonding method of substrate and electric or electronic parts with solder alloy.
  26. Akram Salman ; Wood Alan G. ; Farnworth Warren M., Stackable chip scale semiconductor package with mating contacts on opposed surfaces.
  27. Karnezos Marcos (Menlo Park CA), Tab grid array.
  28. Papageorge Marc V. (Boca Raton FL) Pennisi Robert W. (Boca Raton FL) Davis James L. (Coral Springs FL), Thermally conducting adhesive containing aluminum nitride.
  29. Yew Chee Klang,SGX ; Low Siu Waf,SGX ; Chan Min Yu,SGX, Thin stacked integrated circuit device.
  30. Higgins ; III Leo M. (Austin TX), Z-axis compliant mechanical IC wiring substrate and method for making the same.

이 특허를 인용한 특허 (3)

  1. 'Khng, Victor Tan Cher; Chai, Lee Kian, Method for fabricating semiconductor package with multi-layer die contact and external contact.
  2. Gerber, Mark A., Packaged semiconductor devices.
  3. Ohta, Hironori, Semiconductor device, printed wiring board for mounting the semiconductor device and connecting structure for these.
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