Method for fabricating semiconductor package with multi-layer metal bumps
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-021/50
H01L-021/02
H01L-021/44
출원번호
US-0867530
(2004-06-14)
등록번호
US-7253022
(2007-08-07)
발명자
/ 주소
'Khng,Victor Tan Cher
Chai,Lee Kian
출원인 / 주소
Micron Technology, Inc.
인용정보
피인용 횟수 :
3인용 특허 :
30
초록▼
A semiconductor package includes a substrate formed of a board material, a semiconductor die bonded to the substrate, and an encapsulant on the die. The package also includes an array of external contacts formed as multi layered metal bumps that include a base layer, a bump layer, and a non-oxidizin
A semiconductor package includes a substrate formed of a board material, a semiconductor die bonded to the substrate, and an encapsulant on the die. The package also includes an array of external contacts formed as multi layered metal bumps that include a base layer, a bump layer, and a non-oxidizing outer layer. The external contacts are smaller and more uniform than conventional solder balls, and can be fabricated using low temperature deposition processes, such that package warpage is decreased. Further, the external contacts can be shaped by etching to have generally planar tip portions that facilitate bonding to electrodes of a supporting substrate. Die contacts on the substrate can also be formed as multi layered metal bumps having generally planar tip portions, such that the die can be flip chip mounted to the substrate. A method for fabricating the package includes the step of depositing the different layers for the metal bumps using electroless and electrolytic deposition, and then etching the different layers to shape the metal bumps.
대표청구항▼
What is claimed is: 1. A method for fabricating a semiconductor package comprising: providing a substrate having a first side and an opposing second side; forming a plurality of first bonding sites on the first side and a plurality of second bonding sites on the second side at a same time; depositi
What is claimed is: 1. A method for fabricating a semiconductor package comprising: providing a substrate having a first side and an opposing second side; forming a plurality of first bonding sites on the first side and a plurality of second bonding sites on the second side at a same time; depositing first metal layers on the first bonding sites and on the second bonding sites; depositing second metal layers on the first metal layers; depositing non-oxidizing third metal layers on the second metal layers to form die contacts on the first side and external contacts for the package on the second side; and mounting a semiconductor die to the die contacts in electrical communication with the external contacts. 2. The method of claim 1 wherein the depositing the first metal layers step comprises electrolessly or electrolytically depositing copper on the first bonding sites and on the second bonding sites. 3. The method of claim 2 wherein the depositing the second metal layers step comprises electrolessly or electrolytically depositing nickel on the first metal layers. 4. The method of claim 3 wherein the depositing the third metal layers step comprises electrolessly or electrolytically depositing gold on the second metal layers. 5. The method of claim 1 wherein the external contacts are sized and shaped to decrease a thickness of the package relative to packages having solder balls, to facilitate bonding to a second substrate, and to insure a planarity of the package on the second substrate. 6. A method for fabricating a semiconductor package comprising: providing a semiconductor die comprising a plurality of bond pads; providing a substrate having a first side and an opposing second side; forming a plurality of die contacts on the first side and a plurality of external contacts on the second side in electrical communication with the die contacts at a same time, each die contact and each external contact comprising a base metal layer, a bump metal layer, a non-oxidizing outer metal layer and a generally planar tip portion; and mounting the die to the first side in a flip chip configuration with the bond pads bonded to the die contacts. 7. The method of claim 6 further comprising encapsulating the die. 8. The method of claim 6 wherein the base metal layer comprises copper, the bump metal layer comprises nickel and the nonoxidizing outer metal layer comprises gold. 9. The method of claim 6 wherein the substrate comprises a material selected from the group consisting of bismaleimide-trizine (BT), epoxy resins, and polyimide resins. 10. The method of claim 6 wherein the forming step comprises electrolessly or electrolytically depositing the base metal layer, the bump metal layer and the nonoxidizing outer metal layer. 11. A method for fabricating a semiconductor package comprising: providing a substrate comprising a board material having a first side and an opposing second side; forming a plurality of first bonding sites on the first side and a plurality of second bonding sites on the second side in electrical communication with the first bonding sites by depositing a first metal layer on the first side and a second metal layer on the second side at a same time; depositing first metal layers on the first bonding sites and on the second bonding sites; depositing second metal layers on the first metal layers; depositing non-oxidizing third metal layers on the second metal layers to form a plurality of die contacts on the first side and a plurality of external contacts for the package on the second side; and flip chip mounting a semiconductor die to the substrate by bonding the die to the die contacts. 12. The method of claim 11 wherein the flip chip mounting step comprises thermocompression bonding bond pads on the die to the die contacts. 13. The method of claim 11 wherein each of the depositing steps comprises electroless or electrolytic deposition. 14. The method of claim 11 further comprising encapsulating the die in an encapsulant. 15. The method of claim 11 wherein the first metal layers comprise copper, the second metal layers comprise nickel, and the third metal layers comprise gold. 16. The method of claim 11 wherein the substrate comprises a material selected from the group consisting of bismaleimide-trizine (BT), epoxy resins, and polyimide resins. 17. A method for fabricating a semiconductor package comprising: providing a substrate having a first side and an opposing second side; forming a plurality of first bonding sites on the first side and a plurality of second bonding sites on the second side in electrical communication with the first bonding sites at a same time; forming a plurality of die contacts on the first bonding sites; forming a plurality of external contacts on the second bonding sites; each die contact and each external contact comprising a generally pyramidal shaped projection comprising a first metal layer on a bonding site, a second metal layer on the first metal layer, and a non-oxidizing third metal layer on the second metal layer; and mounting a semiconductor die to the die contacts. 18. The method of claim 17 further comprising encapsulating the die in an encapsulant. 19. The method of claim 17 wherein the first metal layer comprises copper, the second metal layer comprises nickel, and the third metal layer comprise gold. 20. The method of claim 17 wherein the substrate comprises a material selected from the group consisting of bismaleimide-trizine (BT), epoxy resins, and polyimide resins. 21. A method for fabricating a semiconductor package comprising: providing a semiconductor die comprising a plurality of bond pads; providing a substrate having a first side, an opposing second side and an opening; forming a plurality of bonding sites on the second side and a plurality of conductors on the second side in electrical communication with the bonding sites; forming a plurality of external contacts on the second side, each external contact comprising a first metal layer on a bonding site, a second metal layer on the first metal layer, and a nonoxidizing third metal layer on the second metal layer, each external contact comprising a generally pyramidal shaped projection sized and shaped to decrease a thickness of the package relative to packages having solder balls, to facilitate bonding to a second substrate, and to insure a planarity of the package on the second substrate; mounting the die to the first side in a board-on-chip configuration with the bond pads aligned with the opening; and wire bonding the bond pads to the conductors. 22. The method of claim 21 further comprising forming an encapsulant in the opening. 23. The method of claim 21 wherein the first metal layer comprises copper, the second metal layer comprises nickel, and the third metal layer comprise gold. 24. The method of claim 21 wherein the substrate comprises a material selected from the group consisting of bismaleimide-trizine (BT), epoxy resins, and polyimide resins. 25. A method for fabricating a semiconductor package comprising: providing a semiconductor die comprising a plurality of bond pads; providing a substrate having a first side, an opposing second side and a recess in the second side; forming a plurality of bonding sites on the second side and a plurality of conductors on the second side in electrical communication with the bonding sites; forming a plurality of external contacts on the second side, each external contact comprising a first metal layer on a bonding site, a second metal layer on the first metal layer, and a non-oxidizing third metal layer on the second metal layer; each external contact comprising a generally pyramidal shaped projection sized and shaped to decrease a thickness of the package relative to packages having solder balls, to facilitate bonding to a second substrate, and to insure a planarity of the package on the second substrate; mounting the die in the recess in contact with a heat spreader; and wire bonding the bond pads to the conductors. 26. The method of claim 25 further comprising forming an encapsulant in the recess. 27. The method of claim 25 wherein the first metal layer comprises copper, the second metal layer comprises nickel, and the third metal layer comprise gold. 28. The method of claim 25 wherein the substrate comprises a material selected from the group consisting of bismaleimide-trizine (BT), epoxy resins, and polyimide resins.
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