Process for making photonic crystal circuits using an electron beam and ultraviolet lithography combination
IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0504518
(2003-02-14)
|
등록번호 |
US-7255804
(2007-08-14)
|
국제출원번호 |
PCT/US03/004682
(2003-02-14)
|
§371/§102 date |
20040813
(20040813)
|
국제공개번호 |
WO03/071587
(2003-08-28)
|
발명자
/ 주소 |
- Prather,Dennis W.
- Murakowski,Janusz
|
출원인 / 주소 |
|
대리인 / 주소 |
Connolly Bove Lodge & Hutz, LLP
|
인용정보 |
피인용 횟수 :
7 인용 특허 :
10 |
초록
▼
A process for making photonic crystal circuit and a photonic crystal circuit consisting of regularly-distributed holes in a high index dielectric material, and controllably-placed defects within this lattice, creating waveguides, cavities, etc. for photonic devices. The process is based upon the dis
A process for making photonic crystal circuit and a photonic crystal circuit consisting of regularly-distributed holes in a high index dielectric material, and controllably-placed defects within this lattice, creating waveguides, cavities, etc. for photonic devices. The process is based upon the discovery that some positive ultraviolet (UV) photoresists are electron beam sensitive and behave like negative electron beam photoresists. This permits creation of photonic crystal circuits using a combination of electron beam and UV exposures. As a result, the process combines the best features of the two exposure methods: the high speed of UV exposure and the high resolution and control of the electron beam exposure. The process also eliminates the need for expensive photomasks.
대표청구항
▼
What is claimed is: 1. A process for making a photonic crystal circuit, comprising: depositing an ultraviolet positive, electron beam negative photoresist layer on a substrate; patterning defects into portions of the photoresist layer by exposing the portions of the photoresist layer to an electron
What is claimed is: 1. A process for making a photonic crystal circuit, comprising: depositing an ultraviolet positive, electron beam negative photoresist layer on a substrate; patterning defects into portions of the photoresist layer by exposing the portions of the photoresist layer to an electron beam; exposing the photoresist layer to an interference pattern resulting from coherent sources of ultraviolet radiation; and chemically developing the photoresist layer with a developer, wherein the developer dissolves areas of the photoresist layer exposed to the ultraviolet radiation and unexposed to the electron beam. 2. A process for making a photonic crystal circuit as recited in claim 1, wherein the substrate comprises a silicon-on-insulator substrate. 3. A process for making a photonic crystal circuit as recited in claim 1, wherein the depositing of the photoresist layer comprises spinning a liquid solution of the photoresist on the substrate and evaporating a solvent from the liquid solution. 4. A process for making a photonic crystal circuit as recited in claim 1, wherein the photoresist layer is a propyleneglycol monomethyl ether acetate formulated photoresist. 5. A process for making a photonic crystal circuit as recited in claim 1, wherein the photonic crystal circuit comprises regularly distributed holes and a controlled pattern of defects. 6. A process for making a photonic crystal circuit as recited in claim 5, wherein three coherent sources of ultraviolet radiation are used to create a triangular lattice of antinodes of the interference pattern in the photoresist layer. 7. A process for making a photonic crystal circuit as recited in claim 6, wherein the pattern of holes correspond to the antinodes of the interference pattern formed in the photoresist layer and the areas of the photoresist layer unexposed to the electron beam. 8. A process for making a photonic crystal circuit as recited in claim 1, wherein the developer comprises a tetramethylammonium hydroxide. 9. A process for making a photonic crystal circuit as recited in claim 1, further comprising transferring the pattern of holes to the substrate by etching the substrate. 10. A process for making a photonic crystal circuit as recited in claim 1, farther comprising, prior to the depositing the photoresist layer, depositing a metal layer on the substrate. 11. A process for making a photonic crystal circuit as recited in claim 10, further comprising transferring the pattern of holes to the metal layer by etching the metal layer. 12. A photonic crystal circuit made by the process of claim 1. 13. A photonic crystal circuit as recited in claim 12, wherein the substrate comprises a silicon-on-insulator substrate. 14. A photonic crystal circuit as recited in claim 12, wherein the photoresist layer is a propyleneglycol monomethyl ether acetate formulated photoresist. 15. A photonic crystal circuit as recited in claim 12, wherein a triangular lattice of antinodes of an interference pattern are created in the photoresist layer with the ultraviolet radiation. 16. A photonic crystal circuit as recited in claim 15, wherein the pattern of holes correspond to the antinodes of the interference pattern formed in the photoresist layer and the areas of the photoresist layer unexposed to the electron beam. 17. A photonic crystal circuit as recited in claim 12, wherein the pattern of holes is transferred to the substrate by etching the substrate. 18. A photonic crystal circuit as recited in claim 12, further comprising a metal layer disposed between the substrate and the photoresist layer. 19. A photonic crystal circuit as recited in claim 18, wherein the pattern of holes is transferred to the metal layer by etching the metal layer.
이 특허에 인용된 특허 (10)
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Lin, Chin-Hsiang, Combined E-beam and optical exposure semiconductor lithography.
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Merritt David Paul ; Moreau Wayne Martin ; Wood Robert Lavin, Highly sensitive positive photoresist composition.
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Cowan James J. (Lexington MA), Method and apparatus for exposing photosensitive material.
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Louis Joseph Dogue, Isabelle; Hatate, Hitoshi; Kagotani, Tsuneo; Aoyama, Tsutomu, Method for forming fine exposure patterns using dual exposure.
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Yasuhiko Sato JP, Method of forming a pattern by making use of hybrid exposure.
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Kobayashi Koichi (Yokohama JPX) Takahashi Yasushi (Kawasaki JPX), Method of forming fine resist pattern in electron beam or X-ray lithography.
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Mochiji Kozo (Tachikawa JPX) Maruyama Yozi (Hachioji JPX) Okazaki Shinji (Urawa JPX) Murai Fumio (Tokyo JPX), Method of forming patterns.
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Hanawa Tetsuro (Hyogo JPX) Op de Beeck Maria (Hyogo JPX), Method of manufacturing semiconductor device.
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Koyama, Tomoko, Optical multiplexing and demultiplexing device, optical communication apparatus, and optical communication system.
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Fink, Yoel; Thomas, Edwin L., Polymeric photonic band gap materials.
이 특허를 인용한 특허 (7)
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Song, Stanley Seungchul; Xu, Jeffrey Junhao; Yang, Da; Yeap, Choh Fei, Electron-beam (E-beam) based semiconductor device features.
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Bandhauer, Todd M.; Reinke, Michael J.; Valensa, Jeroen, High temperature fuel cell system with integrated heat exchanger network.
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Bandhauer, Todd M.; Reinke, Michael J.; Valensa, Jeroen, High temperature fuel cell system with integrated heat exchanger network.
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Bandhauer, Todd M.; Reinke, Michael J.; Valensa, Jeroen, High temperature fuel cell system with integrated heat exchanger network.
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Murakowski,Janusz; Prather,Dennis W., Method for fabricating optical devices in photonic crystal structures.
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Lee, Eun-kyung; Choi, Byoung-Iyong; Ahn, Pil-soo; Kim, Jun-young; Jin, Young-gu, Method of manufacturing silicon optoelectronic device, silicon optoelectronic device manufactured by the method, and image input and/or output apparatus using the silicon optoelectronic device.
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Lee, Eun-kyung; Choi, Byoung-iyong; Ahn, Pil-soo; Kim, Jun-young; Jin, Young-gu, Method of manufacturing silicon optoelectronic device, silicon optoelectronic device manufactured by the method, and image input and/or output apparatus using the silicon optoelectronic device.
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