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Selective nickel plating of aluminum, copper, and tungsten structures 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
  • H01L-021/02
  • H01L-029/12
  • H01L-029/02
출원번호 US-0934635 (2004-09-02)
등록번호 US-7279407 (2007-10-09)
발명자 / 주소
  • Akram,Salman
  • Wark,James M.
  • Hiatt,William M.
출원인 / 주소
  • Micron Technology, Inc.
대리인 / 주소
    TraskBritt
인용정보 피인용 횟수 : 10  인용 특허 : 21

초록

A method of selectively plating nickel on an intermediate semiconductor device structure. The method comprises providing an intermediate semiconductor device structure having at least one aluminum or copper structure and at least one tungsten structure. One of the aluminum or copper structure and th

대표청구항

What is claimed is: 1. A method of selectively plating nickel on an intermediate semiconductor device structure, comprising: nickel plating one of at least one exposed aluminum or copper structure and at least one exposed tungsten structure on an intermediate semiconductor device structure while th

이 특허에 인용된 특허 (21)

  1. Dean, Timothy B.; Lytle, William H., Activation plate for electroless and immersion plating of integrated circuits.
  2. Rauno Verner Rantanen FI, Apparatus for coating a moving web with at least two coat layers.
  3. Sinha, Nishant, Constructions comprising solder bumps.
  4. Tench, D. Morgan; Warren, Jr., Leslie F.; White, John T., Controlled plating on reactive metals.
  5. Ting Chiu H. (Saratoga CA) Paunovic Milan (Port Washington NY), Electroless deposition for IC fabrication.
  6. Bengston Jon E. (Newington CT), Electroless plating of nickel onto surfaces such as copper or fused tungston.
  7. Suehiro Mitsuo,JPX ; Osawa Satoshi,JPX ; Kikuchi Shunichi,JPX, I/O pin having solder dam for connecting substrates.
  8. Siniaguine, Oleg, Integrated circuits and methods for their fabrication.
  9. Gaul Stephen Joseph, Intergrated circuit with coaxial isolation and method.
  10. Gaul Stephen Joseph (Melbourne FL), Method of bonding wafers having vias including conductive material.
  11. Lin, Charles W. C., Method of connecting a conductive trace and an insulative base to a semiconductor chip.
  12. Gaul Stephen J. (Melbourne FL), Method of fabrication of surface mountable integrated circuits.
  13. Dong, Cha Deok, Method of forming an isolation layer in a semiconductor devices.
  14. Takase Yoshihisa,JPX ; Okazaki Naoki,JPX, Method of forming electric pad of semiconductor device and method of forming solder bump.
  15. Jiang, Tongbi, Method of making electrical interconnection for attachment to a substrate.
  16. Brandenburger Jrgen (Selb DEX), Process for electrolessly depositing nickel.
  17. Lindgren, Joseph T., Selective passivation of exposed silicon.
  18. Toshiaki Hasegawa JP; Hajime Nakayama JP, Semiconductor device having a low dielectric layer as an interlayer insulating layer.
  19. Lin Kwang-Lung,TWX ; Lee Chwan-Ying,TWX, Solder bump fabricated method incorporate with electroless deposit and dip solder.
  20. Gaul Stephen J. (Melbourne FL), Surface mountable integrated circuit with conductive vias.
  21. Gaul Stephen Joseph (Melbourne FL), System for interconnecting stacked integrated circuits.

이 특허를 인용한 특허 (10)

  1. Yi, Sheng-Hung; Liao, Pen-Yi, Capacitive touch sensitive housing and method for making the same.
  2. Yi, Sheng-Hung; Liao, Pen-Yi, Capacitive touch sensitive housing and method for making the same.
  3. Yi, Sheng-Hung; Liao, Pen-Yi, Circuit substrate having a circuit pattern and method for making the same.
  4. Pogge, H. Bernhard; Yu, Roy R., Metal filled through via structure for providing vertical wafer-to-wafer interconnection.
  5. Kraus, Harald; Schier, Hebert, Method for etching semiconductor structures and etching composition for use in such a method.
  6. Akram, Salman; Wark, James M.; Hiatt, William Mark, Methods of forming interconnects and semiconductor structures.
  7. Akram, Salman; Wark, James M.; Hiatt, William M., Methods of forming interconnects in a semiconductor structure.
  8. Yi, Sheng-Hung; Liao, Pen-Yi, Non-deleterious technique for creating continuous conductive circuits upon the surfaces of a non-conductive substrate.
  9. Yi, Sheng-Hung; Liao, Pen-Yi, Non-deleterious technique for creating continuous conductive circuits upon the surfaces of a non-conductive substrate.
  10. Akram, Salman; Wark, James M.; Hiatt, William Mark, Semiconductor devices comprising nickel- and copper-containing interconnects.
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