IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0361000
(2003-02-06)
|
등록번호 |
US-7331040
(2008-02-12)
|
우선권정보 |
GB-0202728.2(2002-02-06) |
발명자
/ 주소 |
- Sandham,John H.
- North,Geraint
|
출원인 / 주소 |
|
대리인 / 주소 |
Wilmer Cutler Pickering Hale and Dorr LLP
|
인용정보 |
피인용 횟수 :
9 인용 특허 :
67 |
초록
▼
An emulator (30) allows subject code (10) written for a subject processor (12) having subject processor registers (14) and condition code flags (16) to run in a non-compatible computing environment (2). The emulator (30) identifies and records parameters of instructions in the subject code (10) that
An emulator (30) allows subject code (10) written for a subject processor (12) having subject processor registers (14) and condition code flags (16) to run in a non-compatible computing environment (2). The emulator (30) identifies and records parameters of instructions in the subject code (10) that affect status of the subject condition code flags (16). Then, when an instruction in the subject code (10) is encountered, such as a branch or jump, that uses the flag status to make a decision, the flag status is resolved from the recorded instruction parameters. Advantageously, emulation overhead is substantially reduced.
대표청구항
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What is claimed is: 1. A method for emulating condition code flags during program code conversion, comprising the steps of: (a) identifying a flag-affecting instruction in a sequence of subject code instructions, wherein the flag-affecting instruction selectively modifies a flag; (b) recording para
What is claimed is: 1. A method for emulating condition code flags during program code conversion, comprising the steps of: (a) identifying a flag-affecting instruction in a sequence of subject code instructions, wherein the flag-affecting instruction selectively modifies a flag; (b) recording parameters of the identified flag-affecting instruction; (c) detecting a flag-usage instruction in the sequence of subject code instructions, wherein the flag-usage instruction uses the flag; and (d) resolving, in response to detecting the flag-usage instruction, a status of the flag with respect to the recorded parameters. 2. The method of claim 1, wherein the step (d) comprises explicitly calculating a flag status by emulating effects of the identified flag-affecting instruction on one or more subject condition code flags. 3. The method of claim 2, wherein the step (b) comprises setting a flag status indicator to a pending state to indicate that parameters have been recorded, and the step (d) comprises setting the flag status indicator to a normalised state to indicate that a flag status has been explicitly calculated. 4. The software of claim 2 further operable to perform the step of recording the first flag affecting instruction as the most recent flag affecting instruction. 5. The method of claim 1, wherein the step (d) comprises implicitly determining flag status with reference to the recorded parameters. 6. The method of claim 1, wherein the step (c) comprises determining a flag usage type with reference to a type of the detected flag-usage instruction, and the step (d) comprises resolving flag status either by explicitly calculating a flag status or by implicitly determining a flag status, according to the determined flag usage type. 7. The method of claim 1, wherein the step (a) comprises identifying a second flag-identifying instruction in the sequence of subject code instructions, and the step (b) comprises replacing the recorded parameters with parameters of the second flag-affecting instruction. 8. The method of claim 1, wherein the step (a) comprises identifying a type of flag-affecting instruction as one of a plurality of predetermined types, and the step (b) comprises recording parameters for each type of flag-affecting instruction. 9. The method of claim 8, wherein the predetermined types include a first type instruction affecting a full set of condition code flags, and a second type instruction affecting a subset of the full set of condition code flags. 10. The method of claim 9, wherein the step (d) comprises resolving flag status for a full set of condition code flags with respect to the recorded first-type parameters, and resolving flag status with respect to the subset of the condition code flags with respect to the recorded second-type parameters. 11. The method of claim 10, wherein the step (d) comprises explicitly determining flag status from the recorded first-type parameters, and modifying the explicitly determined flag status from the recorded second-type parameters. 12. The method of claim 8, wherein the predetermined types include instruction types each affecting a condition code flag set amongst a plurality of condition code flag sets. 13. The method of claim 1, wherein the recorded parameters include an instruction type parameter and one or more instruction operand parameters. 14. The method of claim 13, wherein recording an instruction operand parameter comprises storing a reference to a location containing an operand. 15. The method of claim 13, wherein recording an instruction operand parameter comprises determining that an operand remains available unmodified at an original location and storing a reference to the original location as the instruction operand parameter, or else copying the operand from the original location to a dedicated operand parameter storage location. 16. The method of claim 13, comprising providing a plurality of abstract registers representing registers of a subject processor, and supplementing the abstract registers with one or more additional abstract registers each for storing an operand as an instruction operand parameter. 17. A computer-readable recording medium containing program code constructions for performing the method of claim 1. 18. A method for emulating condition code flags during program code conversion, comprising: selecting a sequence of subject code instructions; identifying a flag-affecting instruction in the sequence of subject code instructions, the flag-affecting instruction specifying an operation that selectively affects subject condition code flags of a subject processor; recording parameters of the identified flag-affecting instruction including an instruction type parameter and one or more operand parameters; detecting a flag-usage instruction in the sequence of subject code instructions, wherein the flag-usage instruction uses at least one of the subject condition code flags, the flag-usage instruction specifying an operation with reference to a flag status of one or more of the subject condition code flags; and in response to detecting a flag-usage instruction, resolving a flag status of one or more of the subject condition code flags with respect to the recorded parameters. 19. The method of claim 18, comprising updating the recorded parameters when a new flag-affecting instruction is encountered in the sequence of subject code instructions. 20. The method of claim 18, comprising recording parameters for a plurality of flag-affecting instructions. 21. The method of claim 20, wherein the plurality of flag-affecting instructions are each associated with differing sets of subject condition code flags. 22. The method of claim 18, comprising resolving flag status by at least one of (a) explicitly calculating a status for one or more subject condition code flags by emulating an effect of the recorded flag-affecting instruction, or (b) implicitly representing the flag-usage instruction using the recorded parameters, or (c) selecting between options (a) and (b) according to a type of the flag-usage instruction. 23. The method of claim 18, wherein the recorded parameters include at least one instruction operand parameter, and wherein recording the instruction operand parameter comprises at least one of (a) copying an operand to a predetermined storage location, or (b) storing a reference to an original location containing the operand, or (c) selectively performing (a) or (b). 24. A computer-readable recording medium containing program code constructions for performing the method of claim 18. 25. An emulator apparatus for use in a target computing environment for emulating a subject processor of a subject computing environment when translating subject code appropriate to the subject computing environment to produce target code appropriate to the target computing environment, the emulator apparatus comprising: means for identifying a flag-affecting instruction in a sequence of subject code instructions, wherein the flag-affecting instruction selectively modifies a flag; an instruction parameter store for recording parameters of the identified flag-affecting instruction; means for detecting a flag-usage instruction in the sequence of subject code instructions, wherein the flag-usage instruction uses the flag; and means for resolving, in response to detecting the flag-usage instruction, a status of the flag with respect to the instruction parameters recorded in the instruction parameter store. 26. A computing platform comprising the emulator apparatus of claim 25.
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