IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0919546
(2004-08-16)
|
등록번호 |
US-7339253
(2008-03-04)
|
발명자
/ 주소 |
- Tsai,Chao Tzung
- Wang,Ling Sung
- Yen,Ching Lang
|
출원인 / 주소 |
- Taiwan Semiconductor Manufacturing Company
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
7 인용 특허 :
40 |
초록
▼
Methods are provided for making retrograde trench isolation structures with improved electrical insulation properties. One method comprises the steps of: forming a retrograde trench in a silicon substrate, and forming a layer of silicon oxide on the walls of the trench by thermal oxidation, such tha
Methods are provided for making retrograde trench isolation structures with improved electrical insulation properties. One method comprises the steps of: forming a retrograde trench in a silicon substrate, and forming a layer of silicon oxide on the walls of the trench by thermal oxidation, such that the trench is sealed and a space is formed within the layer of silicon oxide. The space can contain a vacuum or any of a variety of gases depending upon conditions of the thermal oxidation step. Retrograde trench isolation structures containing a space are also provided.
대표청구항
▼
What is claimed is: 1. A trench structure, comprising: a semiconductor substrate having a trench therein; said trench having a first portion, a second portion and walls, the second portion having a larger dimension than the first portion; and said trench having a layer of silicon oxide on the walls
What is claimed is: 1. A trench structure, comprising: a semiconductor substrate having a trench therein; said trench having a first portion, a second portion and walls, the second portion having a larger dimension than the first portion; and said trench having a layer of silicon oxide on the walls of said trench, wherein said first portion and said second portion connect to a single opening on a top surface of said semicondactor substrate and said layer of silicon oxide has sealed said single opening of the trench, with at least a space formed beneath said layer of silicon oxide, wherein the space has a substantially oval shape with a long axis in a horizontal direction and a short axis in a vertical direction. 2. The trench of claim 1, wherein said space substantially contains a vacuum. 3. The trench of claim 1, wherein the space contains a gas. 4. The trench of claim 1, wherein the semiconductor substrate is a silicon substrate. 5. The trench of claim 4, wherein the silicon substrate further comprises a rounded top surface adjacent said trench. 6. The trench of claim 1, wherein said second portion comprises a substantially round bottom. 7. The trench of claim 6 further comprising a dielectric material tip disposed on said substantially round bottom. 8. The trench of claim 1, wherein said layer of silicon oxide extends from said first portion into said second portion. 9. The trench of claim 8, wherein said layer of silicon oxide extending from said first portion into said second portion has a notch substantially at a position where said first portion and said second portion meet. 10. The trench of claim 1, wherein said space has a substantially oval shape with a long axis in a horizontal direction and a short axis in a vertical direction. 11. The trench of claim 1, wherein said layer of silicon oxide extends from one side of said single opening along a first sidewall of said first portion, a first sidewall of said second portion, a bottom of said second portion, a second sidewall of said second portion and a second sidewall of said first portion to another side of said single opening. 12. A method of making the isolation structure according to claim 1, comprising the steps of: forming the retrograde trench in the silicon substrate, the trench having the first portion, the second portion and walls, the second portion of the trench having a larger dimension than the first portion; forming the layer of silicon oxide on the walls of said trench by thermal oxidation; and sealing the trench so that at least the space is formed in said second portion. 13. The method of claim 12, wherein a top surface of said layer of silicon oxide formed by thermal oxidation is between the substrate and a mask layer over the substrate. 14. The method of claim 12, wherein the surface of said layer of silicon oxide formed by thermal oxidation is above a surface of the substrate. 15. The method of claim 12, wherein a mask layer above the substrate is removed without planarization. 16. The method of claim 12, wherein oxidation of the silicon substrate under edges of the mask layer occurs during said thermal oxidation process. 17. The method of claim 16, further comprising removal of the mask layer such that the surface of the silicon substrate at edges of the trench are rounded. 18. A method of making the isolation structure according to claim 1, comprising the steps of: forming the trench having walls and a bottom in the silicon substrate having oxide and mask layers thereon; forming the layer of silicon oxide on the walls and bottom of said trench by thermal oxidation; forming a self aligned trench opening in a portion of said silicon oxide layer and into the silicon substrate; isotropically etching the silicon substrate to produce a retrograde portion of the trench; forming an additional layer of silicon oxide by thermal oxidation; and sealing the trench so that at least the space is formed within the additional silicon oxide layer. 19. The method of claim 18, wherein a top surface of said layer of silicon oxide formed by thermal oxidation is above a surface of the substrate. 20. A method of making the isolation structure according to claim 1, comprising the steps of: forming a first trench in the silicon substrate having a surface and oxide and mask layers; filling said first trench with a first dielectric material, and subsequently removing the oxide and mask layers to produce a substrate with a filled first trench; applying a second set of oxide and mask layers to the surface of said substrate and said first filled trench; masking a portion of the surface of said second mask layer such that a second trench can be formed in said first filled trench containing said first dielectric material; forming the second trench through a portion of said first dielectric material and into the substrate; isotropically etching an exposed portion of said silicon substrate to produce a retrograde portion of the second trench; forming a layer of silicon oxide by thermal oxidation; and sealing the second trench so that at least the space is created therein. 21. The method of claim 20, further comprising the step of filling said sealed second trench with a dielectric material. 22. The method of claim 21, further comprising the step of removing the oxide and mask layers. 23. The method of claim 20, wherein a top surface of said layer of silicon oxide formed by thermal oxidation is above the substrate surface. 24. The method of claim 23, further comprising the step of removing the oxide and mask layers. 25. A method of making the isolation structure according to claim 1, comprising the steps of: forming a first trench in the substrate having a surface, oxide and first mask layers; filling said first trench with a first dielectric material; applying a second mask layer above the trench; removing at least a portion of said second mask layer such that spacers are formed over a portion of the surface of said first dielectric material; forming a second trench throught the first dielectric material between said spacers; etching an exposed portion of the substrate to produce a retrograde portion of the second trench; forming a layer of silicon oxide by thermal oxidation; and sealing the second trench so that at least the space is created therein. 26. The method of claim 25, further comprising the step of filling said sealed second trench with a dielectric material. 27. The method of claim 25, further comprising the step of removing said spacers, oxide and mask layers. 28. A method of fabricating a semiconductor device having the isolation device according to claim 1, comprising: forming a semiconductor device on the substrate of the semiconductor substrate; forming a retrograde trench in the silicon substrate proximate to the semiconductor device, the trench having the first portion, the second portion and walls, the second portion of the trench having a larger dimension than the first portion; forming the layer of silicon oxide on the walls of said trench by thermal oxidation; and sealing the trench so that at least the space is formed in said second portion, thereby forming an isolation device in the semiconductor substrate. 29. The method of claim 28, wherein said semiconductor device is a transistor or capacitor.
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