초록 ▼

A technique for extending the size of a power transistor beyond one integrated circuit is disclosed. An example apparatus includes a first integrated circuit chip having a first switch, which includes first, second and third terminals. The first integrated circuit chip further includes a first drive

A technique for extending the size of a power transistor beyond one integrated circuit is disclosed. An example apparatus includes a first integrated circuit chip having a first switch, which includes first, second and third terminals. The first integrated circuit chip further includes a first driver circuit having an input and an output. The first integrated circuit chip also has a first control circuit coupled to output a first control signal. A second integrated circuit chip is included, which has a second switch including first, second and third terminals. The second integrated circuit chip also includes a second driver circuit having an input and an output. The second and third terminals of the first switch are coupled to the second and third terminals, respectively, of the second switch. The first driver circuit input and the second driver circuit input are coupled to receive the first control signal. The first driver circuit output is coupled to drive the first terminal of the first switch to switch the first switch with the first control signal. The second driver circuit output is coupled to drive the first terminal of the second switch to switch the second switch with the first control signal.

대표청구항 ▼

What is claimed is: 1. An apparatus, comprising: a first integrated circuit chip including a first switch having first, second and third terminals, the first integrated circuit chip further including a first driver circuit having an input and an output, the first integrated circuit chip further inc

What is claimed is: 1. An apparatus, comprising: a first integrated circuit chip including a first switch having first, second and third terminals, the first integrated circuit chip further including a first driver circuit having an input and an output, the first integrated circuit chip further including a first control circuit coupled to output a first control signal; and a second integrated circuit chip including a second switch having first, second and third terminals, the second integrated circuit chip further including a second driver circuit having an input and an output, the second and third terminals of the first switch coupled to the second and third terminals, respectively, of the second switch, the first driver circuit input and the second driver circuit input coupled to receive the first control signal, the first driver circuit output coupled to drive the first terminal of the first switch to switch the first switch with the first control signal, the second driver circuit output coupled to drive the first terminal of the second switch to switch the second switch with the first control signal. 2. The apparatus of claim 1 wherein the first and the second driver circuits are all coupled to be powered by a single power source. 3. The apparatus of claim 1 wherein the first and the second switches comprise field effect transistors (FETs). 4. The apparatus of claim 3 wherein the first and the second switches comprise metal oxide semiconductor field effect transistors (MOSFETs). 5. The apparatus of claim 1 wherein the first control circuit comprises a current sense circuit coupled to the first switch to sense a current through the first switch. 6. The apparatus of claim 5 wherein the first control signal is coupled to turn off the first and second semiconductor switches in response to the current sense circuit when the current through the first switch exceeds a current limit threshold. 7. The apparatus of claim 5 wherein the current sense circuit is coupled to the second and third terminals of the first switch. 8. The apparatus of claim 5 wherein the current sense circuit is coupled to detect a voltage drop across an on-resistance of the first switch. 9. The apparatus of claim 1 wherein the first control circuit comprises a temperature sense circuit thermally coupled to the first switch to sense a temperature of the first switch, the temperature sense circuit coupled to cause the first control circuit to control power dissipation of the first and second switches with the first control signal. 10. The apparatus of claim 1 wherein the first control circuit comprises a switched mode regulator circuit. 11. The apparatus of claim 1 wherein the first control circuit comprises a power factor controller circuit. 12. The apparatus of claim 1 wherein the first control circuit comprises a digital amplifier circuit. 13. The apparatus of claim 1 wherein the apparatus is included in a switched mode power supply. 14. The apparatus of claim 1 wherein the apparatus is included in an alternating current (AC) to direct current (DC) power supply. 15. The apparatus of claim 1 wherein the apparatus is included in a direct current (DC) to DC power supply. 16. The apparatus of claim 1 wherein the apparatus is included in a power factor correction circuit. 17. The apparatus of claim 1 wherein the apparatus is included in a digital power amplifier circuit.