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A process and structure for a metal interconnect includes providing a substrate with a first electric conductor, forming a first dielectric layer and a first patterned hard mask, using the first patterned hard mask to form a first opening and a second electric conductor, forming a second dielectric

A process and structure for a metal interconnect includes providing a substrate with a first electric conductor, forming a first dielectric layer and a first patterned hard mask, using the first patterned hard mask to form a first opening and a second electric conductor, forming a second dielectric layer and a second patterned hard mask, using the second patterned hard mask as an etching mask and using a first patterned hard mask as an etch stop layer to form a second opening and a third electric conductor.

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What is claimed is: 1. A method for making a metal interconnect comprising: providing a substrate and at least a first electric conductor; forming a first dielectric layer over the first electric conductor on the substrate; forming a first patterned hard mask on the first dielectric layer to define

What is claimed is: 1. A method for making a metal interconnect comprising: providing a substrate and at least a first electric conductor; forming a first dielectric layer over the first electric conductor on the substrate; forming a first patterned hard mask on the first dielectric layer to define at least a first opening; using the first patterned hard mask as an etching mask to etch the first dielectric layer to form the first opening in the first dielectric layer; forming a first metal layer to fill the first opening and covering the first patterned hard mask; using the first patterned hard mask as a polishing stop layer and performing a polishing process on the first metal layer to form a second electric conductor in the first opening and electrically connecting the second electric conductor to the first electric conductor; forming a second dielectric layer over the first patterned hard mask and the second electric conductor; forming a second patterned hard mask on the second dielectric layer to define at least a second opening; using the second patterned hard mask as an etching mask and using the first patterned hard mask and the second electric conductor as an etch stop layer to etch the second dielectric layer to form the second opening in the second dielectric layer; and forming a third electric conductor in the second opening and electrically connecting the third electric conductor to the second electric conductor. 2. The method of claim 1, wherein the first electric conductor comprises a gate, a source, a drain, or a doped region. 3. The method of claim 2, wherein the first opening is a contact hole and the second electric conductor is a contact plug. 4. The method of claim 3, wherein a contact etch stop layer (CESL) is formed between the substrate and the first dielectric layer and covers the first electric conductor. 5. The method of claim 1, wherein forming the first patterned hard mask comprises: forming a mask layer, a bottom antireflective coating (BARC) layer, and a patterned photoresist layer on the first dielectric layer; using the patterned photoresist layer as an etching mask to etch the BARC layer and the mask layer to transfer the pattern of the patterned photoresist layer to the mask layer to form the first patterned hard mask; and removing the patterned photoresist layer and the BARC layer. 6. The method of claim 5, wherein an after-development-inspection critical dimension (ADI CD) of the patterned photoresist layer is larger than an after etch-inspection critical dimension (AEI CD) of the first patterned hard mask. 7. The method of claim 5, wherein the first electric conductor contains a silicide layer, and a forming temperature of the mask layer is under 400�� C. 8. The method of claim 7, wherein the mask layer is composed of a chemical compound of silicon with carbon or nitrogen. 9. The method of claim 1, wherein the second opening includes a via hole, a trench, a single damascene opening, or a dual damascene opening. 10. The method of claim 9, wherein the third electric conductor includes a via plug or a metal line. 11. The method of claim 9, wherein forming the third electric conductor in the second opening comprises: forming a second metal layer to fill the second opening and covering the second electric conductor and part of the first patterned hard mask; and using the second dielectric layer as stop layer and performing a second CMP process for the second metal layer. 12. The method of claim 11, wherein the second metal layer includes copper. 13. The method of claim 1, wherein the second patterned hard mask layer is a patterned photoresist layer. 14. The method of claim 1, wherein a BARC layer is formed between the second patterned hard mask layer and the second dielectric layer.