IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0484460
(2002-11-07)
|
등록번호 |
US-7380115
(2008-05-27)
|
국제출원번호 |
PCT/US02/035786
(2002-11-07)
|
§371/§102 date |
20040115
(20040115)
|
국제공개번호 |
WO03/043254
(2003-05-22)
|
발명자
/ 주소 |
|
출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
13 인용 특허 :
35 |
초록
▼
A direct memory access (DMA) engine has virtually all control in connection with data transfers that can involve one or both of primary and secondary controllers. The DMA engine receives a command related to a data transfer from a processor associated with the primary controller. This command causes
A direct memory access (DMA) engine has virtually all control in connection with data transfers that can involve one or both of primary and secondary controllers. The DMA engine receives a command related to a data transfer from a processor associated with the primary controller. This command causes the DMA engine to access processor memory to obtain metadata therefrom. In performing a DMA operation, the metadata enables the DMA engine to conduct data transfers between local memory and remote memory. In performing exclusive OR operations, the DMA engine is involved with conducting data transfers using local memory.
대표청구항
▼
What is claimed is: 1. A method for processing data, comprising: providing at least a first controller communicable with a remote memory, said first controller including a direct memory access (DMA) engine; providing at least a processor communicating with a processor memory; storing information us
What is claimed is: 1. A method for processing data, comprising: providing at least a first controller communicable with a remote memory, said first controller including a direct memory access (DMA) engine; providing at least a processor communicating with a processor memory; storing information using said processor with said processor memory related to data for processing, said information comprising a number of elements including at least a first element and a second element; starting a process related to said information; accessing firstly said processor memory using said DMA engine to obtain said first element, wherein said accessing firstly comprises said DMA engine retrieving the first element from the processor memory in a CPU table data format that is the same data format of said first element that was used when said first element was stored in said processor memory; processing first data related to said first element; accessing secondly said second element from said processor memory using said DMA engine after said step of processing said first data; and processing second data related to said second element. 2. A method, as claimed in claim 1, wherein: said step of accessing secondly is conducted independently of said processor. 3. A method, as claimed in claim 1, wherein: at least said first controller is part of a first structure including a chip and said processor memory is external of said structure. 4. A method, as claimed in claim 1, wherein: said starting step includes sending a command to said DMA engine. 5. A method for processing data, comprising: providing at least a first controller communicable with a remote memory, said first controller including a direct memory access (DMA) engine; providing at least a processor communicating with a processor memory; storing information using said processor with said processor memory related to data for processing, said information comprising a number of elements including at least a first element and a second element; starting a process related to said information; accessing firstly said processor memory using said DMA engine to obtain said first element in a first data format; processing first data related to said first element without changing the first element from the first data format; accessing secondly said second element from said processor memory using said DMA engine after said step of processing said first data; and processing second data related to said second element, wherein for each of said number of elements, said DMA engine accesses said processor memory without interrupting said processor and, for each of said accessing, a processing of data is conducted before another accessing is conducted of said processor memory using said DMA engine. 6. A method, as claimed in claim 1, wherein: said processing first data includes copying said first data to said remote memory that is relatively remote from said DMA engine. 7. A method, as claimed in claim 1, wherein: said processing first data includes performing a XOR operation. 8. A method for mirroring data from a local memory to a remote memory, comprising: receiving a command at a direct memory access (DMA) engine; retrieving by said DMA engine information from a memory location external to said direct memory access engine, wherein information retrieved from said memory location comprises a data format that is the same data format that was used when said information was stored in said memory location as CPU data; and copying, based on said information contained in said memory location as CPU data, user data from a local memory location to a remote memory location. 9. A method, as claimed in claim 8, wherein: said command is a CPU command related to at least one of a DMA operation and a XOR operation. 10. A method, as claimed in claim 8, further including: determining using said DMA engine whether a DMA operation or a XOR operation is to be performed. 11. A method, as claimed in claim 8, wherein: said information includes description data related to at least a location of said user data. 12. A method, as claimed in claim 8, wherein: said memory location communicates with a CPU. 13. A method, as claimed in claim 8, wherein: said information includes a number of scatter-gather elements that represent the scatter-gather nature of a data storage device. 14. A method, as claimed in claim 8, wherein: said command is sent by a CPU and said copying step is conducted substantially independently of said CPU. 15. An apparatus for mirroring data in a storage system, comprising: a local memory operable to store user data; a remote memory operable to store user data; a processor including a processor memory; and a direct memory access (DMA) engine operable to retrieve description data from said processor memory and to copy said user data from said local memory to said remote memory based on said description data, wherein said description data is used by said DMA engine in the same format as said description data is stored on said processor memory. 16. An apparatus, as claimed in claim 15, wherein: said DMA engine receives a command related to retrieving said description data and copying said user data from said processor and in which said command includes a location in processor memory related to said description data. 17. An apparatus for mirroring data in a storage system, comprising: a local memory operable to store user data; a remote memory operable to store user data; a processor including a processor memory; and a direct memory access (DMA) engine operable to retrieve description data from said processor memory and to copy said user data from said local memory to said remote memory based on said description data, wherein said description data is in a CPU table format, wherein said DMA engine includes at least one command register that has a plurality of fields including a command field related to at least one of an exclusive OR operation and a DMA operation and a source count field related to a number of scatter-gather lists. 18. An apparatus, as claimed in claim 17, wherein: said at least one command register also includes a field related to the current source list number being processed and a field related to an address pointer that is used to identify at least one of said scatter-gather lists associated with said command. 19. An apparatus, as claimed in claim 15, wherein: said DMA engine includes a DMA engine portion used in performing DMA operations and a XOR engine portion used in performing exclusive OR operations. 20. A method, as claimed in claim 1, further comprising: determining whether an indicator is set in said first element indicating that a command has been completed; in the event that said indicator is affirmatively set, performing at least the following: (i) completing said command; and (ii) sending a complete command message to said processor; and in the event that said indicator is not affirmatively set, performing at least the following: (i) determining that said second element is related to said command; and (ii) processing said second element in connection with said command.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.