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A sawtooth waveform generator includes an operational amplifier that generates a ramp signal. The ramp signal charges a capacitor connected between the output of the operational amplifier and the inverting input of the operational amplifier. The inverting input is maintained at a substantially const

A sawtooth waveform generator includes an operational amplifier that generates a ramp signal. The ramp signal charges a capacitor connected between the output of the operational amplifier and the inverting input of the operational amplifier. The inverting input is maintained at a substantially constant voltage, which provides a substantially constant charging current through a timing resistor. The connections to the capacitor are switched when the ramp voltage reaches a predetermined level. A control circuit switches the connections to the capacitor in response to a voltage on one terminal of the capacitor to assure that the connections to the capacitor are switched to a configuration to cause the direction of current flow through the capacitor to be reversed as a result of the switching.

대표청구항 ▼

What is claimed is: 1. A sawtooth waveform generator comprising: an operational amplifier that generates a ramp voltage on an output terminal; a timing circuit that controls the risetime of the ramp voltage generated by the operational amplifier, the timing circuit comprising: a capacitor having a

What is claimed is: 1. A sawtooth waveform generator comprising: an operational amplifier that generates a ramp voltage on an output terminal; a timing circuit that controls the risetime of the ramp voltage generated by the operational amplifier, the timing circuit comprising: a capacitor having a first terminal and a second terminal; a timing resistor connected to an input terminal of the operational amplifier; and a switching circuit that operates during a first interval to connect the first terminal of the capacitor to the output of the operational amplifier and to connect the second terminal of the capacitor to the input terminal of the operational amplifier and the timing resistor, and that operates during a second interval to connect the second terminal of the capacitor to the output of the operational amplifier and to connect the first terminal of the capacitor to the input of the operational amplifier and the timing resistor; and a control circuit that controls the switching circuit, the control circuit responsive to the ramp voltage to cause the switching circuit to switch at a predetermined voltage level and responsive to a voltage level on the first terminal of the capacitor to select which of the first terminal and the second terminal of the capacitor to connect to the output terminal of the operational amplifier. 2. The sawtooth waveform generator defined in claim 1, wherein the control circuit comprises: a first comparator that compares the ramp voltage to a first predetermined voltage and that generates a clock signal when the ramp voltage is greater than the first predetermined voltage; a second comparator that compares a voltage on the first terminal of the capacitor with a second predetermined voltage and that generates a direction signal when the voltage on the first terminal of the capacitor is greater than the second predetermined voltage; and a bistable logic circuit responsive to the clock signal and the direction signal to generate a switch control signal having a first state when the direction signal is active and having a second state when the direction signal is not active. 3. A sawtooth waveform generator comprising: a timing capacitor having a first terminal and a second terminal; an operational amplifier having a first input terminal, a second input terminal and an output terminal, the first input terminal being connected to a fixed voltage source, the second input terminal being connected to a timing resistor, the operational amplifier generating a ramp voltage that varies at a rate determined by the capacitor and the timing resistor; a first switch and a second switch that connect the timing capacitor between the output terminal and the second input terminal of the operational amplifier, the first and second switches having a first switch state in which the first terminal of the timing capacitor is connected to the output of the operational amplifier and the second terminal of the timing capacitor is connected to the second input terminal of the operational amplifier to cause current to flow from the second terminal of the timing capacitor and through the timing resistor, the first and second switches having a second state in which the second terminal of the timing capacitor is connected to the output of the operational amplifier and the first terminal of the timing capacitor is connected to the second input terminal of the operational amplifier to cause current to flow from the first terminal of the timing capacitor and through the timing resistor; and a control circuit responsive to the ramp voltage and responsive to a voltage on a selected one of the first terminal and the second terminal of the timing capacitor, the control circuit providing a control signal to control the first and second switches, the control signal switching the first and second switches to the first switch state when the ramp voltage reaches a predetermined level and when the voltage on the selected one of the first terminal and the second terminal of the timing capacitor is greater than a selected voltage level, the control signal switching the first and second switches to the second switch state when the ramp voltage reaches the predetermined level and when the voltage on the selected one of the first terminal and the second terminal of the timing capacitor is less than the selected voltage level. 4. A method for generating a sawtooth waveform, comprising: connecting one of a first terminal and a second terminal of a timing capacitor to an output terminal of an operational amplifier and connecting the other of the first terminal and the second terminal of the timing capacitor to an input terminal of the operational amplifier and to a timing resistor; generating a linearly varying ramp signal from the output terminal of the operational amplifier to charge the timing capacitor; monitoring the ramp signal and a voltage on a selected terminal of the timing capacitor until the ramp voltage reaches a predetermined level; and performing a selected one of: when the ramp signal reaches the predetermined level and the voltage on the selected terminal of the timing capacitor has a first voltage level, switching the connections to the timing capacitor to connect the first terminal of the timing capacitor to the output of the operational amplifier and to connect the second terminal of the timing capacitor to the input terminal of the operational amplifier and to the timing resistor to charge the timing capacitor in a first direction; and when the ramp signal reaches the predetermined level and the voltage on the selected terminal of the timing capacitor has a second voltage level, switching the connections to the timing capacitor to connect the second terminal of the timing capacitor to the output of the operational amplifier and to connect the first terminal of the timing capacitor to the input terminal of the operational amplifier and to the timing resistor to charge the timing capacitor in a second direction opposite the first direction.