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다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
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Kafe 바로가기국가/구분 | United States(US) Patent 등록 |
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국제특허분류(IPC7판) |
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출원번호 | US-0710149 (2007-02-22) |
등록번호 | US-7403028 (2008-07-22) |
발명자 / 주소 |
|
출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 | 피인용 횟수 : 26 인용 특허 : 906 |
A test structure including a differential gain cell and a differential signal probe include compensation for the Miller effect reducing the frequency dependent variability of the input impedance of the test structure.
I claim: 1. A test structure for testing a functionality of a transistor, said test structure comprising: (a) a first transistor including: (i) a first terminal connectible through a first resistance to a source of a first component of a differential signal; (ii) a second terminal connectible throu
I claim: 1. A test structure for testing a functionality of a transistor, said test structure comprising: (a) a first transistor including: (i) a first terminal connectible through a first resistance to a source of a first component of a differential signal; (ii) a second terminal connectible through a second resistance to a sink for a first component of an output signal and interconnected to said first terminal by a parasitic capacitance; and (iii) a third terminal; (b) a second transistor including: (i) a first terminal connectible through a third resistance to a source of a second component of a differential signal; (ii) a second terminal connectible through a fourth resistance to a sink for a second component of an output signal and interconnected to said first terminal by a parasitic capacitance; and (iii) a third terminal interconnected with said third terminal of said first transistor and a source of a bias voltage; (c) a first compensating capacitor connecting said first terminal of said first transistor to said second terminal of said second transistor; and (d) a second compensating capacitor connecting said first terminal of said second transistor to said second terminal of said first transistor. 2. The test structure of claim 1 wherein said first compensating capacitor has a capacitance substantially equal to said parasitic capacitance interconnecting said first terminal of said first transistor and said second terminal of said first transistor and said second compensating capacitor has a capacitance substantially equal to said parasitic capacitance interconnecting said first terminal of said second transistor to said second terminal of said second transistor. 3. The test structure of claim 1 wherein said first, said second, said third and said fourth resistances have values selected to cause said test structure to have a gain approximating unity.
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