IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0836449
(2001-04-17)
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등록번호 |
US-7427526
(2008-09-23)
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발명자
/ 주소 |
- Fonash,Stephen J.
- Nam,Wook Jun
- Lee,Youngchul
- Chang,Kyuhwan
- Hayes,Daniel J.
- Kalkan,A. Kaan
- Bae,Sanghoon
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출원인 / 주소 |
- The Penn State Research Foundation
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
11 인용 특허 :
36 |
초록
▼
This invention uses large surface to volume ratio materials for separation, release layer, and sacrificial material applications. The invention outlines the material concept, application designs, and fabrication methodologies. The invention is demonstrated using deposited column/void network materia
This invention uses large surface to volume ratio materials for separation, release layer, and sacrificial material applications. The invention outlines the material concept, application designs, and fabrication methodologies. The invention is demonstrated using deposited column/void network materials as examples of large surface to volume ratio materials. In a number of the specific applications discussed, it is shown that it is advantageous to create structures on a laminate on a mother substrate and then, using the separation layer material approach, to separate this laminate from the mother substrate using the present separation scheme. It is also shown that the present materials have excellent release layer utility. In a number of applications it is also shown how the approach can be used to uniquely form cavities, channels, air-gaps, and related structures in or on various substrates. Further, it is demonstrated that it also can be possible and advantageous to combine the schemes for cavity formation with the scheme for laminate separation.
대표청구항
▼
What is claimed is: 1. A method for processing a substrate comprising the steps of: depositing a layer of high surface area to volume ratio material having a non-helical columnar structure over a surface of said substrate; removing at least a portion of said high surface area to volume ratio materi
What is claimed is: 1. A method for processing a substrate comprising the steps of: depositing a layer of high surface area to volume ratio material having a non-helical columnar structure over a surface of said substrate; removing at least a portion of said high surface area to volume ratio material layer; depositing a stencil layer on said substrate; and patterning said stencil layer and selectively removing a portion of said stencil layer, thereby leaving an exposed portion of said substrate and at least one retained portion of said stencil layer, wherein the step of depositing a layer of high surface area to volume ratio material comprises depositing said high surface area to volume ratio material upon said exposed surface of said substrate and on said at least one retained portion of said stencil layer, further comprising the step of lifting off said stencil layer, thereby also removing a portion of said high surface area to volume ratio material layer deposited thereon. 2. The method of claim 1, further comprising the step of depositing a second layer over said substrate and said high surface area to volume ratio material layer. 3. The method of claim 2, further comprising the step of creating through-holes through said second layer for the removal of said high surface to volume ratio material layer through said created through-holes to produce a cavity structure. 4. The method of claim 3, after removal of said high surface area to volume ratio material layer through said created through-holes to produce a cavity structure, thereafter further comprising the step of depositing a layer that blocks said through-holes. 5. The method of claim 3, after removal of said columnar void layer through said created through-holes to produce a cavity structure, thereafter further comprising the steps of adding a gas or liquid in said cavity structure; and depositing a layer that blocks said through-holes and seals said cavity structure. 6. The method of creating a cavity structure in a substrate comprising: a. forming at least one stencil layer over a substrate; b. removing a portion of said stencil layer thereby created an exposed portion of said substrate; c. forming a high surface area to volume ratio material layer over said portion of said stencil layer and said exposed substrate; d. lifting off a portion of said stencil layer, thereby also removing a portion of said high surface area to volume ratio material layer formed thereover and leaving the portion of said high surface area to volume ratio material layer formed on said exposed substrate; e. forming at least one layer over said substrate and said high surface area to volume ratio material layer; and f. removing said high surface area to volume ratio material layer to form a cavity structure. 7. The method of claim 6, wherein said stencil layer comprises a material selected from the group consisting of photoresists, nitrides, oxides, metals, polymers, dielectrics and combinations thereof. 8. The method of claim 6, wherein said substrate is selected from the group consisting of silicon wafers, quartz, glass, organic materials, polymers, ceramics, semiconductor, metals, insulators, and combinations thereof. 9. The method of claim 6, whereby removing said stencil layer in step (b) is performed using a technique selected from a group consisting of dissolving, dry etching, wet etching and combinations thereof. 10. The method of claim 6, wherein said high surface area to volume ratio material layer is deposited. 11. The method of claim 6, wherein said high surface area to volume ratio material is a columnar void layer. 12. The method of claim 11, wherein said columnar void layer is a nano-scale composition comprising: (a) a plurality of uniform essentially non-contacting basic columnar-like units penetrating a continuous void wherein said units have adjustable regular spacing, adjustable uniform height, and adjustable variable diameter, and (b) said plurality of basic columnar-like units are uniformly orientated and disposed over said substrate. 13. The method of claim 6, wherein lifting off said stencil layer in step (d) is performed by dissolving, etching or combinations thereof. 14. The method of claim 6, wherein said at least one layer is a material selected from the group consisting of chemically active materials, polymers, insulators, nitrides, oxides, piezoelectrics, ferroelectrics, metals, pyroelectrics, biological materials and semiconductors. 15. The method of claim 6, wherein removing the high surface area to volume ratio material layer in step (f) is performed by chemical means, mechanical means or combinations thereof. 16. The method of claim 6, further comprising the step of creating through-holes to access said high surface area to volume ratio material layer. 17. The method of claim 6, further comprising the step of adding gas or liquid into said cavity structure after said high surface area to volume ratio material layer is removed in step (f). 18. The method of claim 16, further comprising the step of depositing a further layer, wherein said further layer blocks said through-holes. 19. The method of claim 18, wherein said further layer is a material selected from the group consisting of dielectric, polymeric, metal, photoresist, nitride, oxide, biological, semiconductor, and insulator materials and combinations thereof. 20. The method of claim 6, wherein said cavity structure has a height of at least about 10 nm. 21. The method of claim 6, wherein said cavity structure has a width of at least about 10 nm. 22. The method of claim 6, wherein formation of said cavity structure provides for the fabrication of a use selected from the group consisting of MEMS; field emission sources; bolometric structures; accelerometers; light trapping; resonance; field shaping; transmission; acoustic trapping; display micro-mirror formations; biomedical and medical devices; sorting structures for functions such as DNA and proteomic sorting; cell nutrition, growth control, or both; capillary functions; gettering regions for solid phase crystallization or silicon on insulator structures; interlayer stress control; optical waveguide and optical device applications; fluid channels for electrical, chemical, and electrochemical sensors, chromatography, chemical reactant/product transport; fuel cells; display, and molecular sorting. 23. A method of producing at least one contact region between a first and a second material system over a substrate comprising the steps of: a. forming a first material system over said substrate; b. etching a portion of said first material system; c. forming high surface area to volume ratio material layer over said first material system and said substrate; d. removing a portion of said high surface area to volume ratio material layer to expose a portion of said first material system; e. forming a second material system over said high surface area to volume ratio material layer and exposed portions of said first material system, so that a portion of said second material system contacts a portion of said first material system; and f. removing said high surface area to volume ratio material layer, thereby freeing a portion between said first and second material systems while maintaining said at least one contact region. 24. The method of claim 23, wherein said first material system is selected from the group consisting of metals, semiconductors, chemically active materials, polymers, insulators, nitrides, oxides, piezoelectrics, ferroelectrics, pyroelectrics, biological materials, organic materials and combinations thereof. 25. The method of claim 23, wherein said substrate is a material selected from the group consisting of silicon wafers, quartz, glass, organic materials, polymers, ceramics, semiconductor, metals, and combinations thereof. 26. The method of claim 23, wherein said second material system is selected from the group consisting of metals, semiconductors, chemically active materials, polymers, insulators, nitrides, oxides, piezoelectrics, ferroelectrics, pyroelectrics, biological materials, organic materials, and combinations thereof. 27. The method of claim 23, wherein removal of said high surface area to volume ratio material layer is facilitated by chemical means, physical means or combination thereof. 28. The method of claim 27, wherein removal of said high surface area to volume ratio material layer by chemical means has an etch rate of 25 μm per minute or less. 29. The method of claim 23, wherein production of at least one contact region between a first and a second material system provides for fabrication of a structure selected from the group consisting of MEMS devices, cantilever structures, micro-switch structures, micro-mirror structure, actuators, field emission structures, bolometric structures, accelerometers, biomedical and medical devices, sorting and affixing structures, and electrical, chemical, and electrochemical sensors.
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