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Electronic apparatus and methods of forming the electronic apparatus include a silicon lanthanide oxynitride film on a substrate for use in a variety of electronic systems. The silicon lanthanide oxynitride film may be arranged as a layered structure having one or more monolayers. Metal electrodes

Electronic apparatus and methods of forming the electronic apparatus include a silicon lanthanide oxynitride film on a substrate for use in a variety of electronic systems. The silicon lanthanide oxynitride film may be arranged as a layered structure having one or more monolayers. Metal electrodes may be disposed on a dielectric containing a silicon lanthanide oxynitride film.

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What is claimed is: 1. An electronic device comprising: a substrate; a dielectric layer disposed on the substrate, the dielectric layer including a layer of SiLnON, the layer of SiLnON having a layered structure of one or more monolayers; and a metal electrode on and contacting the dielectric layer

What is claimed is: 1. An electronic device comprising: a substrate; a dielectric layer disposed on the substrate, the dielectric layer including a layer of SiLnON, the layer of SiLnON having a layered structure of one or more monolayers; and a metal electrode on and contacting the dielectric layer. 2. The electronic device of claim 1, wherein the electronic device includes a capacitor having the dielectric layer as a capacitor dielectric. 3. The electronic device of claim 1, wherein the electronic device includes a transistor in which the dielectric layer is disposed. 4. The electronic device of claim 1, wherein the electronic device includes a memory in which the dielectric layer is disposed. 5. The electronic device of claim 1, wherein the dielectric layer consists essentially of the SiLnON layer. 6. The electronic device of claim 1, wherein the electronic device includes contacts to couple the electronic device to other apparatus of a system. 7. The electronic device of claim 1, wherein the layer of SiLnON includes the SiLnON having more Si than Ln. 8. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of SiLnON such that forming the layer of SiLnON includes layering a structure with one or more monolayers; and forming a metal electrode on and contacting the dielectric layer. 9. The method of claim 8, wherein the method includes using atomic layer deposition to form the layer of SiLnON. 10. The method of claim 8, wherein forming a metal electrode includes forming a metal gate of a transistor. 11. The method of claim 8, wherein forming a metal electrode includes forming an electrode of a capacitor. 12. The method of claim 8, wherein the method includes forming the dielectric layer and the metal electrode structured as a memory storage capacitor. 13. The method of claim 8, wherein the method includes forming the dielectric layer and the metal electrode structured as a capacitor in an analog integrated circuit. 14. The method of claim 8, wherein the method includes forming the dielectric layer and the metal electrode structured as a capacitor in a RF integrated circuit. 15. The method of claim 8, wherein the method includes forming the dielectric layer and the metal electrode structured as a capacitor in a mixed signal integrated circuit. 16. The method of claim 8, wherein the method includes forming the dielectric layer structured as a tunnel gate insulator in a flash memory and the metal electrode structured as a floating gate in the flash memory. 17. The method of claim 8, wherein the method includes forming the dielectric layer structured as an inter-gate insulator in a flash memory and the metal electrode structured as a control gate in the flash memory. 18. The method of claim 8, wherein the method includes forming the dielectric layer structured as a nanolaminate dielectric in a NROM flash memory. 19. The method of claim 8, wherein forming a metal electrode includes forming the metal electrode by atomic layer deposition. 20. The method of claim 8, wherein forming a metal electrode includes forming the metal electrode by substituting a desired metal material for a previously disposed substitutable material. 21. The method of claim 8, wherein forming a metal electrode includes forming a self aligned metal electrode on and contacting the dielectric layer. 22. The method of claim 10, wherein forming a metal gate of a transistor includes forming a gate of a silicon MOSFET. 23. The method of claim 10, wherein forming a metal gate of a transistor includes forming a gate of a germanium MOSFET. 24. The method of claim 10, wherein forming a metal gate of a transistor includes forming a gate of a SiGe MOSFET. 25. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of SiLaON, wherein forming the layer of SiLaON includes: forming a layer of SiLaO arranged as a layered structure having one or more monolayers; and nitridizing the SiLaO to form SiLaON; and forming a metal electrode on and contacting the dielectric layer. 26. The method of claim 25, wherein forming a layer of SiLaO includes using atomic layer deposition to form the layer of SiLaO. 27. The method of claim 25, wherein nitridizing the SiLaO to form SiLaON includes nitridizing at temperatures equal to or above 500�� C. 28. The method of claim 25, wherein nitridizing the SiLaO to form SiLaON includes introducing nitrogen by a microwave plasma. 29. The method of claim 25, wherein nitridizing the SiLaO to form SiLaON includes introducing nitrogen by a NH3 anneal. 30. The method of claim 25, wherein forming a layer of SiLaO includes: forming a layer of silicon oxide by atomic layer deposition; forming a layer of lanthanum oxide by atomic layer deposition; and annealing the layer of silicon oxide with the layer of lanthanum oxide to form SiLaO. 31. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of SiLaON, wherein forming the layer of SiLaON formed includes: forming a layer of SiN arranged as a layered structure having one or more monolayers; forming a layer of LaN arranged as a layered structure having one or more monolayers; annealing the layer of SiN with the layer of LaN; and oxidizing the layers of SiN and LaN to form SiLaON. 32. The method of claim 31, wherein forming the layer of SiN includes forming the layer of SiN by atomic layer deposition and forming the layer of LaN includes forming the layer of LaN by atomic layer deposition. 33. The method of claim 31, wherein the method includes forming a metal electrode on and contacting the dielectric layer. 34. The method of claim 31, wherein the annealing and the oxidizing are performed together. 35. The method of claim 31, wherein the layer of SiN and the layer of LaN are annealed and oxidized by rapid thermal oxidation to form SiLaON. 36. The method of claim 31, wherein the method includes forming alternating layers of SiN and LaN prior to annealing. 37. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of SiLaON, wherein forming the layer of SiLaON includes: forming a layer of SiON arranged as a layered structure having one or more monolayers; forming a layer of LaON arranged as a layered structure having one or more monolayers; and annealing the layer of SiON with the layer of LaON to form SiLaON. 38. The method of claim 37, wherein forming the layer of SiON includes forming the layer of SiON by atomic layer deposition and forming the layer of LaON includes forming the layer of LaON by atomic layer deposition. 39. The method of claim 37, wherein the method includes forming a metal electrode on and contacting the dielectric layer. 40. The method of claim 37, wherein the method includes forming alternating layers of SiON and LaON prior to annealing. 41. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of SiLaON such that forming the layer of SiLaON includes layering a structure with one or more monolayers; and forming a metal electrode on and contacting the dielectric layer, the metal electrode formed by: forming a layer of substitutable material on the dielectric layer, the substitutable material including one or more materials selected from the group consisting of carbon, polysilicon, germanium, and silicon-germanium; and substituting a desired metal material for the substitutable material to provide the metal electrode on the dielectric layer. 42. The method of claim 41, wherein the method includes using atomic layer deposition to form the layer of SiLaON. 43. The method of claim 41, wherein the method including forming a layer of the desired metal material on the layer of substitutable material and heating the layers at a temperature below the eutectic temperature of the desired metal material. 44. The method of claim 41, wherein forming a layer of substitutable material includes forming a carbon structure. 45. The method of claim 41, wherein forming a layer of substitutable material includes forming one or more of polysilicon, germanium, or silicon-germanium. 46. The method of claim 44, wherein substituting a desired metal material for the substitutable material includes substituting for the carbon structure one or more materials from the group consisting of gold, silver, a gold alloy, a silver alloy, copper, platinum, rhenium, ruthenium, rhodium, nickel, osmium, palladium, iridium, and cobalt. 47. The method of claim 45, wherein substituting a desired metal material for the substitutable material includes substituting one or more materials from the group consisting of aluminum, copper, silver, gold, and alloys of silver and gold. 48. A method comprising: forming a dielectric layer on a substrate, the dielectric layer including a layer of SiLaON wherein forming the layer of SiLaON includes layering a structure with one or more monolayers; and forming a self aligned metal electrode on and contacting the dielectric layer using a previously disposed sacrificial carbon layer on the dielectric layer and sacrificial carbon sidewall spacers adjacent to the sacrificial carbon layer. 49. The method of claim 48, wherein the method includes using atomic layer deposition to form the layer of SiLaON. 50. The method of claim 48, wherein forming a self aligned metal electrode includes forming a sacrificial carbon gate on the dielectric layer; forming sacrificial carbon sidewall spacers adjacent to the sacrificial carbon gate; forming source/drain regions for a transistor using the sacrificial carbon sidewall spacers to define the source/drain regions; replacing the sacrificial carbon sidewall spacers with non-carbon sidewall spacers; and replacing the sacrificial carbon gate with a desired metal gate material. 51. The method of claim 50, wherein replacing the sacrificial carbon sidewall spacers with non-carbon sidewall spacers includes performing a plasma oxidation process to remove the carbon sidewall spacers. 52. The method of claim 51, wherein replacing the sacrificial carbon gate with a desired metal gate material includes replacing the sacrificial carbon gate with one or more materials from a group consisting of aluminum, tungsten, molybdenum, gold, alloys of gold, silver, alloys of silver, platinum, rhenium, ruthenium, rhodium, nickel, osmium, palladium, iridium, cobalt, and germanium. 53. A method comprising: forming an array of memory cells on a substrate, each memory cell including a dielectric layer having a layer of SiLaON, wherein forming each memory cell includes: forming the layer of SiLaON by layering a structure with one or more monolayers; and forming a metal electrode on and contacting the dielectric layer. 54. The method of claim 53, wherein the method includes: forming a layer of SiLaO using atomic layer deposition; and nitridizing the SiLaO to form SiLaON. 55. The method of claim 53, wherein the method includes: forming a layer of SiN by atomic layer deposition; forming a layer of LaN by atomic layer deposition; annealing the layer of SiN with the layer of LaN; and oxidizing the layers of SiN and the LaN to form SiLaON. 56. The method of claim 53, wherein the method includes: forming a layer of SiON by atomic layer deposition; forming a layer of LaON by atomic layer deposition; and annealing the layer of SiON with the layer of LaON to form SiLaON. 57. The method of claim 53, wherein forming a metal electrode includes: forming a layer of substitutable material on the dielectric layer; and substituting a desired metal material for the substitutable material to provide the metal electrode on the dielectric layer. 58. The method of claim 53, wherein forming a metal electrode includes forming a metal gate of a transistor, the metal gate formed by: forming a sacrificial carbon gate on the dielectric layer; forming sacrificial carbon sidewall spacers adjacent to the sacrificial carbon gate; forming source/drain regions for the transistor using the sacrificial carbon sidewall spacers to define the source/drain regions; replacing the sacrificial carbon sidewall spacers with non-carbon sidewall spacers; and replacing the sacrificial carbon gate with a desired metal gate material to provide the desired metal gate material on the gate dielectric. 59. The method of claim 1, wherein forming the layer of SiLnON includes forming the SiLnON having more Si than Ln. 60. The method of claim 57, wherein forming a layer of substitutable material includes forming a structure having one of more materials of a group consisting of carbon, polysilicon, germanium, and silicon-germanium. 61. The method of claim 58, wherein replacing the sacrificial carbon gate with a desired metal gate material includes replacing the sacrificial carbon gate with one or more materials from a group consisting of aluminum, tungsten, molybdenum, gold, alloys of gold, silver, alloys of silver, platinum, rhenium, ruthenium, rhodium, nickel, osmium, palladium, iridium, cobalt, and germanium. 62. The method of claim 60, wherein substituting a desired metal material for the substitutable material includes substituting one or more materials from the group consisting of aluminum, gold, silver, a gold alloy, a silver alloy, copper, platinum, rhenium, ruthenium, rhodium, nickel, osmium, palladium, iridium, and cobalt. 63. A method comprising: providing a controller; and coupling an electronic device to the controller, the electronic device having a metal electrode disposed on a dielectric layer on a substrate for an integrated circuit, the dielectric layer having a layer of SiLaON such that forming the layer of SiLaON includes layering a structure with one or more monolayers. 64. The method of claim 63, wherein the method includes forming the layer of SiLaON using atomic layer deposition including: forming a layer of silicon oxide by atomic layer deposition; forming a layer of lanthanum oxide by atomic layer deposition; annealing the layer of silicon oxide with the layer of lanthanum oxide to form SiLaO; and nitridizing the SiLaO to form SiLaON. 65. The method of claim 63, wherein the method includes forming the layer of SiLaON using atomic layer deposition including: forming a layer of SiN by atomic layer deposition; forming a layer of LaN by atomic layer deposition; annealing the layer of SiN with the layer of LaN; and oxidizing the layers of SiN and the LaN to form SiLaON. 66. The method of claim 63, wherein the method includes forming the layer of SiLaON using atomic layer deposition including: forming a layer of SiON by atomic layer deposition; forming a layer of LaON by atomic layer deposition; and annealing the layer of SiON with the layer of LaON to form SiLaON. 67. The method of claim 63, wherein the metal electrode is formed by atomic layer deposition. 68. The method of claim 63, wherein the metal electrode is formed by substituting a desired metal material for previously disposed substitutable material. 69. The method of claim 63, wherein the metal electrode is formed by forming a self aligned metal electrode on and contacting the dielectric layer using a previously disposed sacrificial carbon gate on the dielectric layer and sacrificial carbon sidewall spacers adjacent to the sacrificial carbon gate. 70. The method of claim 63, wherein providing a controller includes providing a processor. 71. The method of claim 63, wherein coupling an electronic device to the controller includes coupling a memory to the controller. 72. The method of claim 63, wherein the method includes forming an information handling system. 73. The method of claim 72, wherein forming an information handling system includes forming a portable wireless device.