초록 ▼

Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface; coimplanting two different atomic species through the free

Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface; coimplanting two different atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer; bonding the free surface of the second layer to a host wafer; and supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer. Advantageously, the donor wafer includes a SiGe layer, and the co-implantation of atomic species is conducted according to implantation parameters adapted to enable a first species to form the zone of weakness in the SiGe layer, and to enable a second species to provide a concentration peak located beneath the zone of weakness in the donor wafer to thus minimize surface roughness resulting from detachment at the zone of weakness.

대표청구항 ▼

What is claimed is: 1. A method for forming a semiconductor structure, which comprises: providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface; coimplanting two different atomic species through the free surface of the

What is claimed is: 1. A method for forming a semiconductor structure, which comprises: providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface; coimplanting two different atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer; bonding the free surface of the second layer to a host wafer; supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer; strengthening the bond between the second layer and the host wafer by heat treating the detached semiconductor structure at a temperature between 575�� C. and 625�� C. to provide a bonding energy that is greater than or equal to about 0.8 J/m2; removing the first layer portion from the structure to expose a surface of the second layer; wherein the donor wafer comprises a SiGe layer, and the co-implantation of atomic species is conducted according to implantation parameters adapted to enable a first species to form the zone of weakness in the SiGe layer, and to enable a second species to provide a concentration peak located deeper in the first layer and beneath the zone of weakness in the donor wafer to thus minimize surface roughness resulting from detachment of the semiconductor structure at the zone of weakness, wherein the first species is hydrogen and the second species is helium. 2. The method of claim 1, wherein the first species is hydrogen and the second species is helium, with the helium provided at a dose accounting for approximately 30% to 70% of the total does of hydrogen and helium. 3. The method of claim 2, wherein hydrogen is provided at a dose of about 1��1016/cm2, and helium is provided at a dose of about 0.9 ��1016/cm2, the hydrogen is implanted at an energy of about 30 keV and the helium is implanteed at an energy of 48 to 60 keV. 4. The method of claim 1, wherein implantation parameters are selected to provide a surface roughness of the second layer immediately after detachment that is less than about 40 Å RMS measured on a 10��10 μm portion of the surface. 5. The method of claim 1, wherein the bond strengthening step comprises conducting plasma activation on the free surface of the second layer, the host wafer or both prior to bonding. 6. The method of claim 1, which further comprises conducting a further heat treatment after the bond strengthening step to further strengthen the bond. 7. The method of claim 6, wherein the further bond strengthening heat treatment is conducted at a temperature of above about 350�� C. but less than 800�� C. for between about 30 minutes and about 4 hours. 8. The method of claim 1, wherein the supplying energy comprises heating the structure in a furnace to a temperature that causes detachment, and the bond strengthening heat treatment is conducted after detachment occurs and without removing the structure from the furnace. 9. The method of claim 8, wherein the bond strengthening heat treatment comprises a single temperature change from the detachment temperature to a second temperature that is selected for the bond strengthening heat treatment. 10. The method of claim 8, wherein energy supplied to detach the structure from the donor wafer comprises heating the structure at a temperature of about 500�� C. for a time of about 30 minutes to about 2 hours. 11. The method of claim 1, wherein the first layer portion is remove from the structure by selectively etching. 12. The method of claim 11, which further comprises, after selectively etching growing a layer of the second material on the second layer to increase its thickness. 13. The method of claim 1, which further comprises, prior to bonding, forming a bonding layer comprising an electrically insulating material on the second layer, the host wafer, or both. 14. The method of claim 13, wherein the electrically insulating material is at least one of SiO2, Si3N4 or SixOyNz. 15. The method of claim 1, wherein the semiconductor-on-insulator structure obtained after carrying out the method and after removing any contact between the detached layer and the remaining part of the donor wafer, has a surface roughness of less than about 4 Å RMS measured on a surface of 10��10 μm2, and a bonding energy greater than or equal to around 0.8 J/m2. 16. The method of claim 15, wherein the first layer is made of Si1-xGex with 01-xGex with 01-xGex with 01-xGex under the first layer. 19. The method of claim 18, wherein the donor wafer comprises a support substrate made of bulk Si, a buffer structure made of SiGe, and a multi-layer structure alternatively comprising first layers made of Si1-xGex (x≠0) and second layers made of strained Si, so as to be able to take off several layer transfers from the same donor wafer.