초록 ▼

An output amplifier is provided for use in a bidirectional communications interface, for example, connecting a transmitter and a receiver to a transmission line. The output amplifier includes a differential amplifier pair connected to output circuitry. The differential amplifier pair receives differ

An output amplifier is provided for use in a bidirectional communications interface, for example, connecting a transmitter and a receiver to a transmission line. The output amplifier includes a differential amplifier pair connected to output circuitry. The differential amplifier pair receives differential data signal pairs from each of a transmission line and a transmitter. The output circuitry receives signals from the differential amplifier pair and, in response, forms single-ended output logic signals. The output amplifier suppresses electronic input noise throughput using an asymmetric transfer characteristic that offsets output signal logic levels with respect to input noise signal levels. The asymmetric transfer characteristic is produced by skewing a transfer characteristic of the differential amplifier pair using an asymmetrical transistor configuration at an output side of the differential amplifier pair. The output logic signals represent data received on the transmission line, and are provided to the receiver.

대표청구항 ▼

What we claim is: 1. A method for communicating data in a system including a transmitter, a transmission line, and a receiver, the method comprising: coupling a bidirectional buffer among the transmitter, the receiver, and the transmission line; the bidirectional buffer being operable for: (i) gene

What we claim is: 1. A method for communicating data in a system including a transmitter, a transmission line, and a receiver, the method comprising: coupling a bidirectional buffer among the transmitter, the receiver, and the transmission line; the bidirectional buffer being operable for: (i) generating differential data signal pairs from a difference between differential transmission line signals and differential transmitter signals; and (ii) generating output logic signals representing data received on the transmission line from the differential data signal pairs wherein input noise in the differential data signal pairs is suppressed using an asymmetric transfer characteristic that offsets output signal logic levels with regard to the input noise. 2. The method of claim 1 wherein the asymmetric transfer characteristic is asymmetrically skewed and input noise introduced by a floating input is suppressed. 3. The method of claim 1 further comprising: generating positive polarity data signals from a difference between a positive polarity transmission line signal and a positive polarity transmitter signal, generating negative polarity data signals from a difference between a negative polarity transmission line signal and a negative polarity transmitter signal, generating bias signals in response to an output common mode feedback voltage; and controlling common mode rejection independently for the generation of the positive polarity and negative polarity data signals using the bias signals. 4. A method for interfacing between a transmission line and a communication device, the method comprising: providing an input amplifier circuit having a first and a second differential amplifier and including a differential coupling to the transmission line and a differential coupling to the communication device, generating a positive polarity difference signal and a negative polarity difference signal from differential signals of the transmission line and the communication device; generating a positive polarity data signal by differentially amplifying the positive polarity difference signal; generating a negative polarity data signal by differentially amplifying the negative polarity difference signal; and differentially amplifying the positive polarity data signal and the negative polarity data signal to generate an output logic signal representative of data received via the transmission line, so that the differential amplification of the positive polarity data signal and the negative polarity data signal suppresses input noise using an asymmetric transfer characteristic that offsets output signal logic levels with regard to input noise. 5. The method of claim 4, wherein the differential amplifying applies an amplifier characteristic that is asymmetrically skewed and suppresses noise using the asymmetric transfer characteristic. 6. The method of claim 4, wherein common mode rejection is independently controlled in each of the first and second differential amplifiers using bias signals generated in response to an output common mode feedback voltage from the first and second differential amplifiers. 7. The method of claim 4, further including controlling a common mode feedback circuitry of a differential amplifier to generate a feedback voltage that suppresses a common mode gain so that a common mode rejection is increased. 8. A method of generating an output signal comprising: receiving positive polarity data signals and negative polarity data signals generated from each of a transmission line differential signal pair and a transmitter differential signal pair; and generating an output logic signal in response to the received positive polarity data signals and the received negative polarity data signals that represents data received on the transmission line and for which electronic noise is suppressed using an asymmetric transfer characteristic that offsets output signal logic levels with regard to input noise signals. 9. The method of claim 8, wherein the generating of the asymmetric transfer characteristic includes skewing a transfer characteristic of a differential amplifier pair using an asymmetrical transistor configuration at an output side of the differential amplifier pair. 10. The method of claim 8, further comprising controlling symmetry in switching transients of the output logic signal applying at least one logic gate having a threshold voltage that is higher than a mid-supply voltage of the output circuitry. 11. The method of claim 8, wherein the output circuitry applies at least one NAND logic gate function and a logic threshold voltage of the NAND logic gate function is higher than a supply voltage while switching rise and fall times are maintained as approximately symmetric. 12. A buffer for use in a communications system having a transmitter, a receiver, and a transmission line, the buffer coupling the transmitter and the receiver to the transmission line, and the buffer comprising: input amplifier circuitry coupled to receive transmission line differential signals and transmitter differential signals and to generate data signals of opposite polarities by subtracting the transmitter differential signals from the transmission line differential signals of corresponding polarity; and output circuitry that amplifies and combines the generated data signals to provide single-ended logic signals representative of data received on the transmission line that are coupled to the receiver, and the output circuitry suppresses input noise using an asymmetric transfer characteristic that offsets output signal logic levels with regard to input noise. 13. A method of buffering for use in a communications system having a transmitter, a receiver, and a transmission line, the buffer coupling the transmitter and the receiver to the transmission line, and the method of buffering comprising: generating data signals of opposite polarities by subtracting transmitter differential signals from transmission line differential signals of corresponding polarity; combining the generated data signals of opposite polarities to provide single-ended logic signals representative of data received; and suppressing input noise using an asymmetric transfer characteristic in the combining that offsets output signal logic levels with regard to input noise.