Group III nitride compound semiconductor devices and method for fabricating the same
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-029/26
H01L-029/02
H01L-029/20
출원번호
US-0222792
(2005-09-12)
등록번호
US-7462867
(2008-12-09)
발명자
/ 주소
Tezen,Yuta
출원인 / 주소
Toyoda Gosei Co., Ltd.
대리인 / 주소
McGinn IP Law Group, PLLC
인용정보
피인용 횟수 :
14인용 특허 :
22
초록▼
A sapphire substrate 1 is etched so that each trench has a width of 10 μm and a depth of 10 μm were formed at 10 μm of intervals in a stripe pattern. Next, an AlN buffer layer 2 having a thickness of approximately 40 nm is formed mainly on the upper surface and the bottom surface of t
A sapphire substrate 1 is etched so that each trench has a width of 10 μm and a depth of 10 μm were formed at 10 μm of intervals in a stripe pattern. Next, an AlN buffer layer 2 having a thickness of approximately 40 nm is formed mainly on the upper surface and the bottom surface of the trenches of the substrate 1. Then a GaN layer 3 is formed through vertical and lateral epitaxial growth. At this time, lateral epitaxial growth of the buffer layer 21, which was mainly formed on the upper surface of the trenches, filled the trenches and thus establishing a flat top surface. The portions of the GaN layer 3 formed above the top surfaces of the mesas having a depth of 10 μm exhibited significant suppression of threading dislocation in contrast to the portions formed above the bottoms of the trenches.
대표청구항▼
The invention claimed is: 1. A Group III nitride compound semiconductor device, comprising: a substrate consisting of a single layer, including a post and a trench, which includes at least one structure of a dot-like structure, a stripe-shaped structure, and a grid-like structure formed at an upper
The invention claimed is: 1. A Group III nitride compound semiconductor device, comprising: a substrate consisting of a single layer, including a post and a trench, which includes at least one structure of a dot-like structure, a stripe-shaped structure, and a grid-like structure formed at an upper portion thereof and made of itself, said post and trench having a side wall perpendicular to a surface of said substrate; a buffer layer of a Group III nitride compound semiconductor uniformly formed on said post and on said trench of said substrate along a surface of said substrate, said buffer layer comprising a portion formed on said post and a portion formed in said trench and being a layer for growing a single crystal of Group III nitride compound semiconductor from said buffer layer; a first Group III nitride compound semiconductor layer having a uniform thickness and formed on said buffer layer along said post and said trench of said substrate, and comprising a single crystal portion formed on said post and a single crystal portion formed in said trench; and a second Group III nitride compound semiconductor layer formed on said first Group III nitride compound semiconductor layer, said second Group III nitride compound semiconductor layer being buried in said trench of said substrate and formed on said first Group III nitride compound semiconductor layer and having an upper surface which is uniformly flat, wherein said portion of said buffer layer which is formed on said post of said substrate, and said portion of said buffer layer which is formed in said trench of said substrate are separate. 2. A Group III nitride compound semiconductor device according to claim 1, wherein a thickness of said buffer layer has a range from 100 Å to 500 Å. 3. A Group III nitride compound semiconductor device according to claim 1, wherein said second Group III nitride compound semiconductor layer includes a cavity about said trench. 4. A Group III nitride compound semiconductor device according to claim 1, wherein said upper surface of said second Group III nitride compound semiconductor layer comprises a smooth surface. 5. A Group III nitride compound semiconductor device according to claim 1, wherein said second Group III nitride compound semiconductor layer is formed on said post and trench of said substrate and on an upper surface of said first Group III nitride compound semiconductor layer. 6. A Group III nitride compound semiconductor device according to claim 5, wherein said second Group III nitride compound semiconductor layer is formed directly on said post and trench of said substrate and on an upper surface of said first Group III nitride compound semiconductor layer. 7. A Group III nitride compound semiconductor device according to claim 1, wherein said first Group III nitride compound semiconductor layer comprises a seed layer for growth of said second Group III nitride compound semiconductor layer. 8. A Group III nitride compound semiconductor device according to claim 1, wherein said second Group III nitride compound semiconductor layer includes a cavity formed beneath said upper surface of said second Group III nitride compound semiconductor layer. 9. A Group III nitride compound semiconductor device according to claim 8, wherein a wall of said cavity is formed from a coalesced growth front of said second Group III nitride compound semiconductor layer. 10. A Group III nitride compound semiconductor device according to claim 1, wherein said buffer layer comprises a multi-component layer comprising layers having different compositions. 11. A Group III nitride compound semiconductor device according to claim 1, wherein said portion of said first Group III nitride compound semiconductor layer which is formed on said post of said substrate, and said portion of said first Group III nitride compound semiconductor layer which is formed in said trench of said substrate are separate. 12. A Group III nitride compound semiconductor device according to claim 1, wherein said side wall of said post and trench of said substrate is perpendicular to a bottom surface of said trench of said substrate. 13. A Group III nitride compound semiconductor device according to claim 1, wherein said second Group III nitride compound semiconductor layer is formed on a sidewall of said portion of said buffer layer which is formed on said post of said substrate. 14. A Group III nitride compound semiconductor device according to claim 1, wherein said second Group III nitride compound semiconductor layer is formed on a sidewall of said portion of said first Group III nitride compound semiconductor layer which is formed on said post of said substrate. 15. A Group III nitride compound semiconductor device, comprising: a substrate consisting of a single layer, including a post and a trench, which includes at least one structure of a dot-like structure, a stripe-shaped structure, and a grid-like structure formed at an upper portion thereof and made of itself, said post and trench having a side wall perpendicular to a surface of said substrate; a buffer layer of a Group III nitride compound semiconductor uniformly formed on said post and on said trench of said substrate along a surface of said substrate, said buffer layer comprising a portion formed on said post and a portion formed in said trench and being a layer for growing a single crystal of Group III nitride compound semiconductor from said buffer layer; a first Group III nitride compound semiconductor layer having a uniform thickness and formed on said buffer layer along said post and said trench of said substrate, and comprising a single crystal portion formed on said post and a single crystal portion formed in said trench; and a second Group III nitride compound semiconductor layer formed on said first Group III nitride compound semiconductor layer, said second Group III nitride compound semiconductor layer being buried in said trench of said substrate and formed on said first Group III nitride compound semiconductor layer and having an upper surface which is uniformly flat, wherein said portion of said buffer layer which is formed on said post of said substrate, and said portion of said buffer layer which is farmed in said trench of said substrate are separate, wherein said Group III nitride compound semiconductor device comprises a light-emitting device. 16. A Group III nitride compound semiconductor light-emitting device according to claim 15, wherein a thickness of said buffer layer has a range from 100 Å to 500 Å. 17. A Group III nitride compound semiconductor light-emitting device according to claim 15, wherein said second Group III nitride compound semiconductor layer includes a cavity about said trench.
연구과제 타임라인
LOADING...
LOADING...
LOADING...
LOADING...
LOADING...
이 특허에 인용된 특허 (22)
Davis Robert F. ; Nam Ok-Hyun,KRX ; Zheleva Tsvetanka ; Bremser Michael D., Gallium nitride semiconductor structures including a lateral gallium nitride layer that extends from an underlying gallium nitride layer.
Zheleva Tsvetanka ; Thomson Darren B. ; Smith Scott A. ; Linthicum Kevin J. ; Gehrke Thomas ; Davis Robert F., Methods of fabricating gallium nitride semiconductor layers by lateral growth from sidewalls into trenches, and gallium nitride semiconductor structures fabricated thereby.
Kevin J. Linthicum ; Thomas Gehrke ; Robert F. Davis, Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts.
Gehrke, Thomas; Linthicum, Kevin J.; Davis, Robert F., Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates.
Kevin J. Linthicum ; Thomas Gehrke ; Robert F. Davis, Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on weak posts, and gallium nitride semiconductor structures fabricated thereby.
Braun Matthias,DEX, Process for the fabrication of epitaxial layers of a compound semiconductor on monocrystal silicon and light-emitting diode fabricated therefrom.
Linda T. Romano ; Brent S. Krusor ; Christopher L. Chua ; Noble M. Johnson ; Rose M. Wood ; Jack Walker, Removable large area, low defect density films for led and laser diode growth.
Okuno, Koji; Nitta, Shugo; Saito, Yoshiki; Ushida, Yasuhisa; Nakada, Naoyuki; Boyama, Shinya, Method for producing group III nitride-based compound semiconductor, wafer including group III nitride-based compound semiconductor, and group III nitrided-based compound semiconductor device.
Cha, Nam Goo; Yoo, Geon Wook; Seong, Han Kyu, Method of manufacturing nanostructure semiconductor light emitting device by forming nanocores into openings.
Wang, Wei-E; Rodder, Mark S.; Bowen, Robert C., Methods of forming semiconductor patterns including reduced dislocation defects and devices formed using such methods.
Saxler, Adam William; Sheppard, Scott; Smith, Richard Peter, Nitride-based transistors having laterally grown active region and methods of fabricating same.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.