IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0552038
(2006-10-23)
|
등록번호 |
US-7466185
(2008-12-16)
|
발명자
/ 주소 |
|
출원인 / 주소 |
|
대리인 / 주소 |
Schwegman, Lundberg & Woessner, P.A.
|
인용정보 |
피인용 횟수 :
6 인용 특허 :
6 |
초록
▼
A driver circuit comprising an insulated gate bipolar transistor having a collector coupled to a voltage supply, an emitter coupled to a source of reference potential, and a gate configured to receive a control signal from a driver circuit, and a desaturation circuit conductively coupled between an
A driver circuit comprising an insulated gate bipolar transistor having a collector coupled to a voltage supply, an emitter coupled to a source of reference potential, and a gate configured to receive a control signal from a driver circuit, and a desaturation circuit conductively coupled between an insulated gate and a collector of the insulated gate bipolar transistor to desaturate the insulated gate. The desaturation circuit includes a series coupled bias voltage source, uni-directionally conducting element and switch.
대표청구항
▼
What is claimed is: 1. A driver circuit comprising: an insulated gate bipolar transistor having a collector coupled to a voltage supply, an emitter coupled to a source of reference potential, and a gate configured to receive a control signal from a driver circuit, wherein the voltage supply compris
What is claimed is: 1. A driver circuit comprising: an insulated gate bipolar transistor having a collector coupled to a voltage supply, an emitter coupled to a source of reference potential, and a gate configured to receive a control signal from a driver circuit, wherein the voltage supply comprises a capacitor and a zener diode coupled in parallel; and a desaturation circuit conductively coupled between an insulated gate and a collector of the insulated gate bipolar transistor to desaturate the insulated gate, the desaturation circuit including a series coupled bias voltage source, uni-directionally conducting element, and a switch, wherein the switch is coupled between the insulated gate and the bias voltage source. 2. The driver circuit of claim 1, including a current amplifier operatively coupled to the gate of the insulated gate bipolar transistor. 3. The driver circuit of claim 2, wherein the current amplifier further comprises a push-pull amplifier. 4. The driver circuit of claim 2, wherein the current amplifier and the switch are included in an integrated circuit. 5. The driver circuit of claim 1, further comprising a voltage control circuit coupled between the emitter of the insulated gate bipolar transistor and the cathode of the voltage supply. 6. The driver circuit of claim 5, wherein the voltage control circuit comprises a zener diode. 7. The driver circuit of claim 1, wherein the switch comprises a transistor. 8. The driver circuit of claim 1, wherein the switch further comprises a MOSFET. 9. The driver circuit of claim 1, further comprising a short-circuit detection circuit. 10. The driver circuit of claim 9, wherein the short-circuit detection circuit includes a comparator. 11. A half-bridge circuit, comprising: a high-side IGBT connected between an input voltage and a first node, and a low-side IGBT connected between the first node and a reference voltage, the high-side IGBT having a high-side desaturation circuit electrically coupled between an insulated gate and a collector of the high-side IGBT, the low-side IGBT having a low-side desaturation circuit electrically coupled between an insulated gate and a collector of the low-side IGBT, wherein the high-side IGBT and the low-side IGBT are configured to switch between a conducting state and a blocking state and each of the high-side desaturation circuit and the low-side desaturation circuit includes a series coupled bias voltage source, uni-directionally conducting element, and a switch, wherein the switch is coupled between the insulated gate and the bias voltage source. 12. The circuit of claim 11, further comprises a micro-controller, a first logical circuit and a second logical circuit, wherein the first logical circuit drives the high-side IGBT and the second logical circuit drives the low-side IGBT. 13. The circuit of claim 11, wherein the switch includes a MOSFET. 14. A three-phase inverter circuit, comprising: a first switching module including a first high-side IGBT connected between an input voltage and a first node, and a first low-side IGBT connected between the first node and a reference voltage, the first high-side IGBT having a first high-side desaturation circuit electrically coupled between an insulated gate and a collector of the first high-side IGBT, and the first low-side IGBT having a first low-side desaturation circuit electrically coupled between an insulated gate and a collector of the first low-side IGBT; a second switching module including a second high-side IGBT connected between the input voltage and a second node, and a second low-side IGBT connected between the second node and the reference voltage, the second high-side IGBT having a second high-side desaturation circuit electrically coupled between an insulated gate and a collector of the second high-side IGBT, and the second low-side IGBT having a second low-side desaturation circuit electrically coupled between an insulated gate and a collector of the second low-side IGBT; and a third switching module including a third high-side IGBT connected between the input voltage and a third node, and a third low-side IGBT connected between the third node and the reference voltage, the third high-side IGBT having a third high-side desaturation circuit electrically coupled between an insulated gate and a collector of the third high-side IGBT, and the third low-side IGBT having a third low-side desaturation circuit electrically coupled between an insulated gate and a collector of the third low-side IGBT; wherein the IGBTs are switched to generate a first AC voltage between the first and second nodes, a second AC voltage between the second and third nodes, and a third AC voltage between the third and first nodes; wherein each of first, second, third high-side desaturation circuit and the first, second, third low-side desaturation circuit includes a series coupled bias voltage source, uni-directionally conducting element and a switch; and wherein the switch is coupled between the insulated gate and the bias voltage source. 15. The circuit of claim 14, wherein the switch includes a MOSFET. 16. The circuit of claim 14, further comprising a short-circuit detection circuit.
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