초록 ▼

Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the con

Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.

대표청구항 ▼

What is claimed is: 1. A printed circuit board comprising: a generally parallelepiped-shaped prepreg having a volume, a first CTE, a rigidity of about 25 GPa and a thickness of about 0.15 mm, the prepreg consisting of a fiber material and a resin material that, when cured, encapsulates the fiber ma

What is claimed is: 1. A printed circuit board comprising: a generally parallelepiped-shaped prepreg having a volume, a first CTE, a rigidity of about 25 GPa and a thickness of about 0.15 mm, the prepreg consisting of a fiber material and a resin material that, when cured, encapsulates the fiber material and the resin material occupies about 60% to about 70% of the volume; a circuit pattern on at least one surface of the generally parallelepiped-shaped prepreg; and a protection layer only on the circuit pattern, the protection layer having a second CTE, a difference of about 50 ppm is between the first CTE and the second CTE concentrating on the fiber layer bending stresses due to thermal expansion or via hole punching. 2. The printed circuit board of claim 1 wherein the protection layer is a solder resist and the second CTE is about 60 ppm. 3. The printed circuit board of claim 2 wherein the first CTE is in a range of about 10 ppm to about 14 ppm. 4. The printed circuit board of claim 3 further comprising a filler mixed with the resin material for adjusting the first CTE within the range of about 10 ppm to about 14 ppm. 5. The printed circuit board of claim 1 further comprising a hole punched in the prepreg after curing of the resin material, the fiber material and the resin material being formulated to resist delamination of an interface between the fiber material and the resin material during punching of the hole. 6. The printed circuit board of claim 5 farther comprising an electrical connection through the hole that links a first circuit pattern on a first surface of the prepreg with a second circuit pattern on a second surface of the prepreg. 7. A printed circuit board comprising: a prepreg including a fiber layer and a resin that infiltrates and, when cured, encapsulates the fiber layer, the prepreg having a resin content between 60% and 70% by volume, a rigidity of about 25 GPa, a CTE of about 10 ppm and a thickness of about 0.15 mm or less; a circuit pattern on at least one surface of the prepreg; and a protection layer only on the circuit pattern, the protection layer having a CTE of about 60 ppm, the protection layer cooperating with the resin content to concentrate bending forces due to thermal expansion on the fiber layer. 8. The printed circuit board of claim 7 further comprising: a hole formed in the prepreg by punching, wherein the fiber layer and the resin are formulated to prevent delamination of an interface between the fiber layer and the resin during punching. 9. The printed circuit board of claim 8 further comprising: a first circuit on a first surface of the prepreg; a second circuit on a second surface of the prepreg; and a third circuit extending through the hole that electrically connects the first and second circuits. 10. The printed circuit board of claim 8 wherein the fiber layer is glass fiber. 11. The printed circuit board of claim 10 wherein the protection layer consists of solder resist. 12. The printed circuit board of claim 7 farther comprising a filler mixed with the resin, the filler controlling the CTE of the prepreg. 13. The printed circuit board of claim 12 wherein an amount of the filler adjusts the CTE of the prepreg within a range of about 10 ppm to about 14 ppm.