IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0487687
(2002-09-03)
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등록번호 |
US-7480825
(2009-01-20)
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우선권정보 |
DE-101 42 894(2001-09-03); DE-101 42 904(2001-09-03); DE-101 44 733(2001-09-11); DE-101 45 795(2001-09-17); DE-101 54 259(2001-11-05); DE-102 02 044(2002-01-19); DE-102 02 175(2002-01-20); DE-102 06 856(2002-02-18); DE-102 07 226(2002-02-21); DE-102 40 022(2002-08-27) |
국제출원번호 |
PCT/DE02/003278
(2002-09-03)
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§371/§102 date |
20040825
(20040825)
|
국제공개번호 |
WO03/023616
(2003-03-20)
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발명자
/ 주소 |
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
5 인용 특허 :
271 |
초록
A method for debugging reconfigurable hardware is described. According to this method, all necessary debug information is written in each configuration cycle into a memory, which is then analyzed by the debugger.
대표청구항
▼
The invention claimed is: 1. A method for debugging a program running on hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and interconnection, comprising: in each of at least a subset of a plurality of configuration cycles performe
The invention claimed is: 1. A method for debugging a program running on hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and interconnection, comprising: in each of at least a subset of a plurality of configuration cycles performed during the running of the program and for which debug information is to be obtained, at least a subset of the reconfigurable hardware modules being reconfigured in each of the configuration cycles with respect to the at least one of function and interconnection: writing debug information into a memory; and reading out of the memory the debug information for use by a debugger; analyzing by the debugger the debug information; and during the running of the program, loading a configuration during the debugging after occurrence of a debugging condition according to which information regarding the configuration to be debugged is needed; wherein the reading out of the memory the debug information is performed using the configuration. 2. The method as recited in claim 1, further comprising: performing a cycle process of a configuration to be debugged, step by step. 3. The method as recited in claim 2, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 4. The method as recited in claim 1, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 5. A method for debugging a program running on hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and interconnection, comprising: in each of at least a subset of a plurality of configuration cycles performed during the running of the program and for which debug information is to be obtained, at least a subset of the reconfigurable hardware modules being reconfigured in each of the configuration cycles with respect to the at least one of function and interconnection: writing debug information into a memory; and reading out of the memory the debug information for use by a debugger; analyzing by the debugger the debug information; during the running of the program, loading a configuration during the debugging after occurrence of a debugging condition according to which information regarding the configuration to be debugged is needed, wherein the reading out of the memory the debug information is performed using the configuration; and writing the debug information into a debugging unit or a debugging configuration. 6. The method as recited in claim 5, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 7. A system, comprising: a hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and arithmetic units interconnection; and a debugging arrangement to debug a program while running on the hardware, wherein the debugging arrangement includes a memory to store debug information wherein: in each of at least a subset of a plurality of configuration cycles (a) performed during the running of the program on the hardware, (b) during which at least a subset of the reconfigurable hardware modules are reconfigured with respect to at least one of function and interconnection, and (c) for which the debug information is to be obtained, the debugging arrangement is configured to: write the debug information into to the memory; and read the debug information out of the memory for use by the debugging arrangement: the debugging arrangement analyzes the debug informatiom during the running of the program, a configuration is loaded during the debugging after occurrence of a debugging condition according to which information regarding the configuration to be debugged is needeth and the reading of the debug information out of the memory is performed using the configuration. 8. The system as recited in claim 7, wherein the memory is a dual-ported RAM having a first input for information to be saved from the field and a second input for readout of information into an analysis device. 9. A method for debugging a program running on hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and interconnection, comprising: in each of at least a subset of a plurality of configuration cycles performed during the running of the program and for which debug information is to be obtained, at least a subset of the reconfigurable hardware modules being reconfigured in each of the configuration cycles with respect to the at least one of function and interconnection: writing debug information into a memory; and reading out of the memory the debug information for use by a debugger; analyzing by the debugger the debug information; during the running of the program, loading a configuration during the debugging after occurrence of a debugging condition according to which information regarding the configuration to be debugged is needed, wherein the reading out of the memory the debug information is performed using the configuration; and altering a configuration to be debugged before the debugging in such a way that information not needed in normal non-debugging execution is stored in a memory. 10. Method as recited in claim 9, further comprising: writing the debug information into a debugging unit or a debugging configuration. 11. The method as recited in claim 10, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 12. The method as recited in claim 9, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 13. A method for debugging a program running on hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and interconnection, comprising: in each of at least a subset of a plurality of configuration cycles performed during the running of the program and for which debug information is to be obtained, at least a subset of the reconfigurable hardware modules being reconfigured in each of the configuration cycles with respect to the at least one of function and interconnection: writing debug information into a memory; and reading out of the memory the debug information for use by a debugger; analyzing by the debugger the debug information; during the running of the program, loading a configuration during the debugging after occurrence of a debugging condition according to which information regarding the configuration to be debugged is needed, wherein the reading out of the memory the debug information is performed using the configuration; and at least partially slowing down or stopping a clock pulse frequency for readout. 14. The method as recited in claim 5, further comprising: at least partially slowing down or stopping a clock pulse frequency for readout. 15. The method as recited in claim 14, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 16. The method as recited in claim 13, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 17. A method for debugging a program running on hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and interconnection, comprising: in each of at least a subset of a plurality of configuration cycles performed during the running of the program and for which debug information is to be obtained, at least a subset of the reconfigurable hardware modules being reconfigured in each of the configuration cycles with respect to the at least one of function and interconnection: writing debug information into a memory; and reading out of the memory the debug information for use by a debugger; analyzing by the debugger the debug information; during the running of the program, loading a configuration during the debugging after occurrence of a debugging condition according to which information regarding the configuration to be debugged is needed, wherein the reading out of the memory the debug information is performed using the configuration; altering a configuration to be debugged before the debugging in such a way that information not needed in normal non-debugging execution is stored in a memory; and at least partially slowing down or stopping a clock pulse frequency for readout. 18. The method as recited in claim 17, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 19. A method for debugging a program running on hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and interconnection, comprising: in each of at least a subset of a plurality of configuration cycles performed during the running of the program and for which debug information is to be obtained, at least a subset of the reconfigurable hardware modules being reconfigured in each of the configuration cycles with respect to the at least one of function and interconnection: writing debug information into a memory; and reading out of the memory the debug information for use by a debugger; analyzing by the debugger the debug information; during the running of the program, loading a configuration during the debugging after occurrence of a debugging condition according to which information regarding the configuration to be debugged is needed, wherein the reading out of the memory the debug information is performed using the configuration; writing the debug information into a debugging unit or a debugging configuration; altering a configuration to be debugged before the debugging in such a way that information not needed in normal non-debugging execution is stored in a memory; and at least partially slowing down or stopping a clock pulse frequency for readout. 20. The method as recited in claim 19, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 21. A method for debugging a program running on hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and interconnection, comprising: in each of at least a subset of a plurality of configuration cycles performed during the running of the program and for which debug information is to be obtained, at least a subset of the reconfigurable hardware modules being reconfigured in each of the configuration cycles with respect to the at least one of function and interconnection: writing debug information into a memory; and reading out of the memory the debug information for use by a debugger; analyzing by the debugger the debug information; during the running of the program, loading a configuration during the debugging after occurrence of a debugging condition according to which information regarding the configuration to be debugged is needed, wherein the reading out of the memory the debug information is performed using the configuration; at least partially slowing down or stopping a clock pulse frequency for readout; and performing a cycle process of a configuration to be debugged, step by step. 22. The method as recited in claim 21, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 23. A method for debugging a program running on hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and interconnection, comprising: in each of at least a subset of a plurality of configuration cycles performed during the running of the program and for which debug information is to be obtained, at least a subset of the reconfigurable hardware modules being reconfigured in each of the configuration cycles with respect to the at least one of function and interconnection: writing debug information into a memory; and reading out of the memory the debug information for use by a debugger; analyzing by the debugger the debug information; during the running of the program, loading a configuration during the debugging after occurrence of a debugging condition according to which information regarding the configuration to be debugged is needed, wherein the reading out of the memory the debug information is performed using the configuration; writing the debug information into a debugging unit or a debugging configuration; at least partially slowing down or stopping a clock pulse frequency for readout; and performing a cycle process of a configuration to be debugged, step by step. 24. The method as recited in claim 23, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 25. A method for debugging a program running on hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and interconnection, comprising: in each of at least a subset of a plurality of configuration cycles performed during the running of the program and for which debug information is to be obtained, at least a subset of the reconfigurable hardware modules being reconfigured in each of the configuration cycles with respect to the at least one of function and interconnection: writing debug information into a memory; and reading out of the memory the debug information for use by a debugger; analyzing by the debugger the debug information; during the running of the program, loading a configuration during the debugging after occurrence of a debugging condition according to which information regarding the configuration to be debugged is needed, wherein the reading out of the memory the debug information is performed using the configuration; altering a configuration to be debugged before the debugging in such a way that information not needed in normal non-debugging execution is stored in a memory; at least partially slowing down or stopping a clock pulse frequency for readout; and performing a cycle process of a configuration to be debugged, step by step. 26. The method as recited in claim 25, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information. 27. A method for debugging a program running on hardware including modules that are reconfigurable in a configuration cycle with respect to at least one of function and interconnection, comprising: in each of at least a subset of a plurality of configuration cycles performed during the running of the program and for which debug information is to be obtained, at least a subset of the reconfigurable hardware modules being reconfigured in each of the configuration cycles with respect to the at least one of function and interconnection: writing debug information into a memory; and reading out of the memory the debug information for use by a debugger; analyzing by the debugger the debug information; during the running of the program, loading a configuration during the debugging after occurrence of a debugging condition according to which information regarding the configuration to be debugged is needed, wherein the reading out of the memory the debug information is performed using the configuration; writing the debug information into a debugging unit or a debugging configuration; altering a configuration to be debugged before the debugging in such a way that information not needed in normal non-debugging execution is stored in a memory; at least partially slowing down or stopping a clock pulse frequency for readout; and performing a cycle process of a configuration to be debugged, step by step. 28. The method as recited in claim 27, further comprising: simulating a configuration to be debugged according to readout of relevant information or according to previously available information.
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