초록 ▼

Polyimide substrates, and polymer laminates for optical and electronic applications are described. Single or multi-layer waveguide structures are deposited on the polyimide substrates. Laminates including polymer or a hybrid organic/inorganic waveguiding film can be deposited on a polished polyimide

Polyimide substrates, and polymer laminates for optical and electronic applications are described. Single or multi-layer waveguide structures are deposited on the polyimide substrates. Laminates including polymer or a hybrid organic/inorganic waveguiding film can be deposited on a polished polyimide substrate. The laminate can also include piezoelectric and metallic layers. Micromachined optical devices, such as cantilevered waveguide are fabricated by laser ablation using a combination of IR and UV lasers. A fiber-to-waveguide coupler with a laser-machined groove for holding the fiber is also disclosed. Holes are drilled with excimer and YAG laser in the polyimide substrate and metallized to provide continuous electrical contact between both sides of the substrate. Metallized polyimide substrates are bumped and stacked to provide high density interconnects. The polyimide substrate is bonded to a semiconductor wafer. Thin SOI or epitaxially grown layer with devices is transferred to the polyimide substrate by grinding and etching the semiconductor wafer.

대표청구항 ▼

What is claimed is: 1. A substrate for a circuit structure comprising: a planar substrate mass of bulk polyimide material having a first side and a second side, said first side having a surface smoothness between about 0.025 μinch and 100 μinch, capable of receiving a circuit structure.

What is claimed is: 1. A substrate for a circuit structure comprising: a planar substrate mass of bulk polyimide material having a first side and a second side, said first side having a surface smoothness between about 0.025 μinch and 100 μinch, capable of receiving a circuit structure. 2. The substrate for a circuit structure of claim 1, wherein said polyimide is a thermoset polyimide. 3. The substrate for a circuit structure of claim 1, wherein said polyimide is a thermoplastic polyimide. 4. The substrate for a circuit structure of claim 1, wherein said thermoplastic polyimide is injection molded. 5. The substrate for a circuit structure of claim 1, wherein a second substrate is bonded to said first side of said polyimide substrate. 6. The substrate for a circuit structure of claim 5, wherein said bonding is by fusion without adhesive. 7. The substrate for a circuit structure of claim 5, further comprising an adhesive layer between said polyimide substrate and said second substrate. 8. The substrate for a circuit structure of claim 7, wherein said adhesive layer is made of single or two-part epoxy. 9. The substrate for a circuit structure of claim 5, wherein said second substrate is a semiconductor or glass wafer. 10. The substrate for a circuit structure of claim 9, wherein said semiconductor wafer is made of silicon, SOI, germanium, or gallium arsenide. 11. A method of preparing a substrate for a circuit structure comprising: providing a planar substrate mass of bulk polyimide material having a first side and a second side; and polishing said first side to a surface smoothness between about 0.025 μinch and 100 μinch. 12. The method of claim 11, further comprising: shaping said planar polyimide substrate mass to form holes using at least one laser emitting in the ultraviolet spectral range. 13. A substrate for a circuit structure comprising: a planar substrate mass of bulk polyimide material having a first side and a second side, said first side having a surface smoothness between about 0.025 μinch and 100 μinch, further comprising a semiconducting layer bonded to said first side of said polyimide substrate. 14. The substrate for a circuit structure of claim 13 further comprising an adhesive layer between said polyimide substrate and said semiconducting layer. 15. The substrate for a circuit structure of claim 14 further comprising a metallic layer between said adhesive layer and said semiconducting layer. 16. The substrate of claim 14 wherein said semiconducting layer is mono-crystalline. 17. The substrate of claim 16 wherein said semiconducting layer contains an electrical circuit. 18. The substrate of claim 17 wherein said electrical circuit is a photovoltaic solar cell. 19. The substrate of claim 18 wherein said semiconducting layer is grown epitaxially on a germanium wafer. 20. The substrate of claim 19 wherein said semiconducting layer is a multi-junction solar cell.