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The use of atomic layer deposition (ALD) to form a nanolaminate layered dielectric layer of cerium oxide and aluminum oxide acting as a single dielectric layer with a ratio of approximately two to one between the cerium oxide and the aluminum oxide, and a method of fabricating such a dielectric laye

The use of atomic layer deposition (ALD) to form a nanolaminate layered dielectric layer of cerium oxide and aluminum oxide acting as a single dielectric layer with a ratio of approximately two to one between the cerium oxide and the aluminum oxide, and a method of fabricating such a dielectric layer is described. The described arrangement produces a reliable structure with a high dielectric constant (high-k) for use in a variety of electronic devices. The dielectric structure is formed by depositing cerium oxide by atomic layer deposition onto a substrate surface using precursor chemicals, followed by depositing aluminum oxide onto the substrate using precursor chemicals, and repeating to form the thin laminate structure. Such a dielectric layer of cerium oxide and aluminum oxide may be used as the gate insulator of a MOSFET, as a capacitor dielectric in a DRAM, as a tunnel gate insulator in flash memory, or as a dielectric in an NROM device, because the high dielectric constant (high-k) of the film provides the functionality of a much thinner silicon dioxide film.

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The invention claimed is: 1. An electronic device comprising: an amorphous dielectric structure containing an atomic layer deposited single dielectric layer formed of a plurality of cerium oxide layers and a plurality of aluminum oxide layers in an integrated circuit; and a conductive layer contact

The invention claimed is: 1. An electronic device comprising: an amorphous dielectric structure containing an atomic layer deposited single dielectric layer formed of a plurality of cerium oxide layers and a plurality of aluminum oxide layers in an integrated circuit; and a conductive layer contacting the amorphous dielectric structure. 2. The electronic device of claim 1, wherein the electronic device includes a memory having the amorphous dielectric structure as a gate insulator in a transistor device. 3. The electronic device of claim 2, wherein the gate insulator in the transistor device is an inter-gate insulator in a flash memory device. 4. The electronic device of claim 1, wherein the electronic device includes a transistor in the integrated circuit, the transistor having the amorphous dielectric structure as a gate insulator and the conductive layer as a gate electrode in the transistor. 5. The electronic device of claim 1, wherein the electronic device includes a CMOS transistor in the integrated circuit, the CMOS transistor having the amorphous dielectric structure as a gate insulator and the conductive layer as a gate. 6. The electronic device of claim 1, wherein the electronic device includes a capacitor having the amorphous dielectric structure as a dielectric material between two electrodes in the capacitor, and the conductive layer as at least one of the two electrodes. 7. A system comprising: a controller; an electronic device coupled to the controller, wherein the electronic device includes: a single dielectric structure comprising at least one substantially continuous layer of cerium oxide and at least one substantially continuous layer of aluminum oxide in an integrated circuit; and a conductive layer contacting the single dielectric structure. 8. The system of claim 7, further including at least one memory device. 9. The system of claim 7, wherein the dielectric structure has a dielectric constant value between 10 to 30. 10. The system of claim 7, wherein the dielectric structure includes a layer of cerium oxide directly contacting a semiconductive surface of the integrated circuit. 11. The system of claim 7, wherein the dielectric structure includes a layer of aluminum oxide directly contacting a semiconductive surface of the integrated circuit. 12. The system of claim 7, wherein the dielectric structure includes a layer of cerium oxide having a first thickness, a layer of aluminum oxide having a second thickness, and the first thickness and the second thickness selected to provide a dielectric constant of 20 for the dielectric structure. 13. The system of claim 7, wherein the dielectric structure includes a first plurality of cerium oxide layers each separated from each other by a second plurality of aluminum oxide layers interleaved between the cerium oxide layers. 14. The system of claim 7, wherein the system further comprises at least one of a bus, a multiplexer, an address decoder, a printer, a magnetic memory device, a central processing unit, an arithmetic processing unit, a wireless communication device, a nonvolatile memory, and an information handling system. 15. A device comprising: a dielectric structure containing cerium oxide and aluminum oxide proximate to a semiconductor surface; and a conductive layer contacting the dielectric structure. 16. The device of claim 15, wherein the dielectric structure is in direct contact with the semiconductor surface. 17. The device of claim 15, wherein the dielectric structure has an amorphous nature. 18. The device of claim 15, wherein the dielectric structure is a gate dielectric in an integrated circuit. 19. The device of claim 15, wherein the dielectric structure is between a floating electrode and the semiconductor surface. 20. The device of claim 15, further including a memory having the dielectric structure as a gate insulator in a transistor device. 21. The device of claim 15, further including a first plurality of cerium oxide layers each separated from each other by a second plurality of aluminum oxide layers disposed between the cerium oxide layers. 22. The device of claim 21, wherein the layers of cerium oxide and aluminum oxide form a nanolaminate. 23. The device of claim 22, wherein the nanolaminate forms an inter-gate insulator in a flash memory device. 24. The device of claim 22, further including at least one CMOS gate, the CMOS transistor having the dielectric structure as a gate insulator. 25. The device of claim 22, further including a capacitor having the dielectric structure as a dielectric material between two electrodes. 26. A device comprising: a dielectric structure on a substrate containing at least cerium oxide and aluminum oxide; the cerium oxide having a formula of about CeO2; the aluminum oxide having a formula of about Al2O3; and a metal layer contacting the dielectric structure. 27. The device of claim 26, wherein the cerium oxide and aluminum oxide are amorphous. 28. The device of claim 26, wherein the dielectric structure is formed of a selected number of layers of cerium oxide and a selected number of layers of aluminum oxide, and heat treated to form a single alloy layer of cerium aluminum oxide. 29. The device of claim 28, wherein each individual one of the cerium oxide layers is less than or equal to two monolayers of cerium oxide in thickness. 30. The device of claim 29, wherein each individual one of the cerium oxide layers is a monolayer. 31. The device of claim 29, wherein the dielectric structure has a root mean square surface roughness that is less than one tenth of the structure thickness. 32. The device of claim 29, wherein the dielectric structure has a root mean square surface roughness that is less than 5 Angstroms. 33. The device of claim 29, wherein the dielectric structure has a dielectric constant of greater than 20. 34. The device of claim 29, wherein the dielectric structure is separated from the substrate by a diffusion barrier. 35. The device of claim 29, wherein the dielectric structure has physical properties determined by the ratio of the cerium oxide and aluminum oxide.