$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Underfill and encapsulation of semiconductor assemblies with materials having differing properties

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/29
  • H01L-023/28
  • H01L-023/02
  • H01L-023/34
  • H01L-023/58
출원번호 UP-0867257 (2004-06-14)
등록번호 US-7547978 (2009-07-01)
발명자 / 주소
  • Hembree, David R.
  • Farnworth, Warren M.
출원인 / 주소
  • Micron Technology, Inc.
대리인 / 주소
    TraskBritt
인용정보 피인용 횟수 : 3  인용 특허 : 198

초록

Polymerized materials for forming the underfill and encapsulation structures for semiconductor package are disclosed. A filler constituent, such as boron nitride, silicates, elemental metals, or alloys, may be added to a liquid photopolymer resin to tailor the physical properties thereof upon curing

대표청구항

What is claimed is: 1. A semiconductor device assembly comprising: at least one semiconductor die having lateral sides, a back side, and an active surface including a plurality of discrete conductive elements projecting therefrom; and a carrier substrate bearing a plurality of conductive traces in

이 특허에 인용된 특허 (198)

  1. Spence Stuart T. (S. Pasadena CA) Almquist Thomas (San Gabriel CA) Tarnoff Harry L. (Van Nuys CA), Apparatus and method for calibrating and normalizing a stereolithographic apparatus.
  2. Spence Stuart T. (South Pasadena CA) Almquist Thomas A. (San Gabriel CA) Tarnoff Harry L. (Van Nuys CA) Juran Warren (Sylmar CA), Apparatus and method for calibrating and normalizing a stereolithographic apparatus.
  3. Spence Stuart T. (South Pasadena CA) Tarnoff Harry L. (Van Nuys CA), Apparatus and method for correcting for drift in production of objects by stereolithography.
  4. Serbin Jurgen,DEX ; Wolff Peter,DEX ; Krug Gabriele,DEX, Apparatus and method for producing an object using stereolithography.
  5. Spence Stuart T. (South Pasadena CA), Apparatus and method for profiling a beam.
  6. Spence Stuart T. (South Pasadena CA), Apparatus and method for profiling a beam.
  7. Gothait, Hanan, Apparatus and method for raised and special effects printing using inkjet technology.
  8. Gothait Hanan,ILX, Apparatus and method for three dimensional model printing.
  9. Hull Charles W. (Santa Clarita CA) Cohen Adam L. (Sherman Oaks CA) Spence Stuart L. (S. Pasadena CA) Lewis Charles W. (Sherman Oaks CA), Apparatus and related method for forming a substantially flat stereolithographic working surface.
  10. Hull Charles W. (Santa Clarita) Jacobs Paul F. (La Crescenta) Schmidt Kris A. (Granada Hills) Smalley Dennis R. (Baldwin Park) Vinson Wayne A. (Valencia CA), Apparatus for building three-dimensional objects with sheets.
  11. Heller Timmy B. (Attleboro MA) Hill Ray M. (Smithfield RI) Greenhalgh Michael R. (Taunton MA) Saggal Abdalla F. (Pawtucket RI), Apparatus for making a solid three-dimensional article from a liquid medium.
  12. Hull Charles W. (Arcadia CA), Apparatus for making three-dimensional objects by stereolithography.
  13. Hull Charles W. (Arcadia CA), Apparatus for production of three-dimensional objects by stereolithography.
  14. Hull Charles W. (Arcadia CA), Apparatus for production of three-dimensional objects by stereolithography.
  15. Heller Timmy B. (Attleboro MA) Hill Ray M. (Smithfield RI) Greenhalgh Michael R. (Taunton MA) Saggal Abdalla F. (Pawtucket RI), Applicator device and method for dispensing a liquid medium in a laser modeling machine.
  16. Derderian, James M., Assemblies including stacked semiconductor devices separated a distance defined by adhesive material interposed therebetween, packages including the assemblies, and methods.
  17. Snead David E. (Canyon Country CA) Smalley Dennis R. (Baldwin Park CA) Cohen Adam L. (Los Angeles CA) Allison Joseph W. (Valencia CA) Vorgitch Thomas J. (Simi Valley CA) Chen Thomas P. (Saugus CA), Boolean layer comparison slice.
  18. Snead David E. ; Smalley Dennis R. ; Cohen Adam L. ; Allison Joseph W. ; Vorgitch Thomas J. ; Chen Thomas P., Boolean layer comparison slice.
  19. Snead, David E.; Smalley, Dennis R.; Cohen, Adam L.; Allison, Joseph W.; Vorgitch, Thomas J.; Chen, Thomas P., Boolean layer comparison slice.
  20. Akram, Salman; Ahmad, Syed Sajid, Collar positionable about a periphery of a contact pad and around a conductive structure secured to the contact pads, semiconductor device components including same, and methods for fabricating same.
  21. Napadensky, Eduardo, Compositions and methods for use in three dimensional model printing.
  22. Bruce Bachman, Conforming shielded form for electronic component assemblies.
  23. Garg Rajeev ; Prud'Homme Robert K. ; Aksay Ilhan A. ; Janas Victor F. ; TenHuisen Kevor S. ; Huxel Shawn T., Controlled architecture ceramic composites by stereolithography.
  24. Pratt Steven D. ; Muthuswamy Sivakumar ; Pennisi Robert W., Electrical discharge machining electrode and rapid method for fabricating same.
  25. Su, Guo-Kai; Tang, Fu-Di, Encapsulated semiconductor device with flash-proof structure.
  26. Farnworth, Warren M., Energy beam patterning of protective layers for semiconductor devices.
  27. Roberts Jay W., Film frame substrate fixture.
  28. Kinsman, Larry D., Flip-chip image sensor packages and methods of fabrication.
  29. David M. Keicher ; James L. Bullen ; Pierrette H. Gorman ; James W. Love ; Kevin J. Dullea ; Mark E. Smith, Forming structures from CAD solid models.
  30. Scott Patrick M. (Newark Valley NY) Glovatsky Andrew Z. (Ypsilanti MI) Mele Michael A. (Endicott NY), Hermetically sealed high density multi-chip package.
  31. Hedrick Jeffrey Curtis ; Papathomas Kostas ; Rai Amarjit Singh ; Tisdale Stephen Leo ; Viehbeck Alfred, High density printed wiring board possessing controlled coefficient of thermal expansion with thin film redistribution layer.
  32. Lisa J. Jimarez ; Miguel A. Jimarez, I/C chip assembly.
  33. Kim,Ho Kyoum; Kim,Young Jun; Yu,In Soon, Image sensor module and method for fabricating the same.
  34. Liu,Hua Hsiang, Image sensor packaging method and structure thereof.
  35. Chen, James; Wang, Rong-Huei, Image sensor semiconductor package.
  36. Moden,Walter, Imaging system.
  37. Akram, Salman; Wood, Alan G.; Farnworth, Warren M., Interposer and methods for fabricating same.
  38. Castro Anthony J. (San Francisco CA) Van Duyne Richard P. (Wilmette IL) Sheng King C. (Troy NY) Bianchini Robert J. (Lakeland FL) Parr William J. (Hopewell Junction NY) Franklin Ralph (Danbury CT) Na, Laser direct writing.
  39. Farnworth, Warren M., Layer thickness control for stereolithography utilizing variable liquid elevation and laser focal length.
  40. Boon,Suan Jeung; Chia,Yong Poo; Neo,Yong Loo; Chua,Swee Kwang; Low,Siu Waf, Leadless packaging for image sensor devices and methods of assembly.
  41. Tsai, Chung-Che, Light sensitive semiconductor package and fabrication method thereof.
  42. Tsai, Chung-Che, Low profile stacked multi-chip semiconductor package with chip carrier having opening and fabrication method of the semiconductor package.
  43. Nulman Jaim (Palo Alto CA) Davenport Robert E. (Sunnyvale CA), Low thermal expansion clamping mechanism.
  44. Yoshimura Yoshitaka (Kitakatsuragi JPX) Oura Yasuhiro (Sakurai JPX), Method and apparatus for applying a protective tape on a wafer and cutting it out to shape.
  45. Evans ; Jr. Herbert E. (Valencia CA) Ertley Ernest W. (Saugus CA) Hull Charles W. (Santa Clarita CA) Leyden Richard N. (Topanga Canyon CA), Method and apparatus for cleaning stereolithographically produced objects.
  46. Manners Chris R. ; Smalley Dennis R., Method and apparatus for identifying surface features associated with selected lamina of a three-dimensional object bei.
  47. Tandy, William D.; Street, Bret K., Method and apparatus for marking a bare semiconductor die.
  48. Tandy, William D; Street, Bret K., Method and apparatus for marking a bare semiconductor die.
  49. Pennisi Robert W. (Boca Raton FL) Urbish Glenn W. (Coral Springs FL), Method and apparatus for producing molded parts.
  50. Hull Charles W. (Santa Clarita CA) Spence Stuart T. (S. Pasadena CA) Albert David J. (Aptos CA) Smalley Dennis R. (Baldwin Park CA) Harlow Richard A. (Marina Del Rey CA) Stinebaugh Phil (Sunnyvale CA, Method and apparatus for production of high resolution three-dimensional objects by stereolithography.
  51. Hull Charles W. (Santa Clarita CA) Spence Stuart T. (So. Pasadena CA) Albert David J. (Aptos CA) Smalley Dennis R. (Baldwin Park CA) Harlow Richard A. (Marina Del Rey CA) Stinebaugh Phil (Sunnyvale C, Method and apparatus for production of high resolution three-dimensional objects by stereolithography.
  52. Hull Charles W., Method and apparatus for production of three-dimensional objects by stereolithography.
  53. Hull Charles W., Method and apparatus for production of three-dimensional objects by stereolithography.
  54. Hull Charles W. (Arcadia CA), Method and apparatus for production of three-dimensional objects by stereolithography.
  55. Hull Charles W. (Arcadia CA), Method and apparatus for production of three-dimensional objects by stereolithography.
  56. Hull Charles W. (Arcadia CA), Method and apparatus for production of three-dimensional objects by stereolithography.
  57. Miyauchi Tateoki (Yokohama JPX) Mizukoshi Katsuro (Yokohama JPX) Hongo Mikio (Yokohama JPX) Mitani Masao (Yokohama JPX) Okunaka Masaaki (Fujisawa JPX) Kawanabe Takao (Mitaka JPX) Tanabe Isao (Higashi, Method and apparatus for redressing defective photomask.
  58. Lee Minju,KRX ; Cho Kilho,KRX, Method and apparatus for singulating semiconductor devices.
  59. Vinson Wayne A. (Valencia CA) Allison Joseph W. (Valencia CA) Jacobs Paul F. (La Crescenta CA) Smalley Dennis R. (Baldwin Park CA), Method and apparatus for stereolithographic curl balancing.
  60. Piper John G. ; Keith Chris, Method and apparatus to hold integrated circuit chips onto a chuck and to simultaneously remove multiple integrated cir.
  61. Runyon, Robert Carrol; Hor, Che Kiong, Method and wafer for maintaining ultra clean bonding pads on a wafer.
  62. Haas Kevin ; Witte Robert ; Kim Sang, Method for etching photolithographically produced quartz crystal blanks for singulation.
  63. Farnworth, Warren M.; Wood, Alan G.; Doan, Trung Tri, Method for fabricating encapsulated semiconductor components.
  64. Farnworth, Warren M.; Duesman, Kevin G., Method for forming three dimensional structures from liquid with improved surface finish.
  65. Patton Scott L., Method for irradiating patterns in optical waveguides containing radiation sensitive constituents.
  66. Yu-Kung Hsiao TW; Sheng-Liang Pan TW; Bi-Cheng Chang TW; Kuo-Liang Lu TW, Method for making long focal length micro-lens for color filters.
  67. Tochioka Takahiro,JPX, Method for producing a polymer composite material.
  68. Fruth Carl,DEX ; Langer Hans,DEX, Method for producing a three-dimensional object.
  69. Hull Charles W. (Arcadia CA), Method for production of three-dimensional objects by stereolithography.
  70. Hull Charles W. (Arcadia CA), Method for production of three-dimensional objects by stereolithography.
  71. Hull Charles W. (Santa Clarita CA), Method for production of three-dimensional objects by stereolithography.
  72. Leyden Richard N. ; Hull Charles W., Method for selective deposition modeling.
  73. Robert G. McKenna ; R. Scott Croff, Method of adhering a wafer to wafer tape.
  74. Park Bae-seung,KRX ; Kim Jin-heung,KRX ; Cho Jung-hyun,KRX, Method of and apparatus for laminating a semiconductor wafer with protective tape.
  75. Hull Charles W., Method of and apparatus for making a three-dimensional object by stereolithography.
  76. Almquist Thomas A. (San Gabriel CA) Modrek Borzo (Montebello CA) Jacobs Paul F. (La Crescenta CA) Lewis Charles W. (Sherman Oaks CA) Lewis Mark A. (Valencia CA) Liran Abraham (Northridge CA), Method of and apparatus for making a three-dimensional product by stereolithography.
  77. Nguyen Hop D. ; Partanen Jouni P., Method of and apparatus for making partially solidified three-dimensional objects on a layer-by-layer basis from a solid.
  78. Almquist Thomas A. (San Gabriel CA) Modrek Borzo (Montebello CA) Jacobs Paul F. (La Crescenta CA) Lewis Charles W. (Sherman Oaks CA) Lewis Mark A. (Valencia CA) Liran Abraham (Northridge CA) Cohen Ad, Method of and apparatus for measuring and controlling fluid level in stereolithography.
  79. Hull Charles W. (Arcadia CA), Method of and apparatus for production of three dimensional objects by stereolithography.
  80. Hull Charles W. (Santa Clarita CA) Spence Stuart T. (So. Pasadena CA) Lewis Charles W. (Van Nuys CA) Vinson Wayne A. (Valencia CA) Freed Raymond S. (Northridge CA) Smalley Dennis R. (Baldwin Park CA), Method of and apparatus for production of three-dimensional objects by stereolithography with reduced curl.
  81. Lee, Wai M.; Maloney, David J.; Roman, Paul J.; Fury, Michael A.; Hill, Ross H.; Henderson, Clifford; Barstow, Sean, Method of and apparatus for substrate pre-treatment.
  82. Smith, John W.; Fjelstad, Joseph, Method of assembling a semiconductor chip package.
  83. Hull Charles W. (Santa Clarita CA) Jacobs Paul F. (La Crescenta CA) Schmidt Kris A. (Granada Hills CA) Smalley Dennis R. (Baldwin Park CA) Vinson Wayne A. (Valencia CA), Method of building three dimensional objects with sheets.
  84. Rimai Lajos ; Samman Amer Mohammad Khaled ; Gebremariam Samuel Admassu, Method of depositing a metal film onto MOS sensors.
  85. Kazuma Sekiya JP, Method of dicing workpiece.
  86. Oka, Takahiro, Method of fabricating semiconductor device.
  87. Juskey Frank J. (Coral Springs FL) Suppelsa Anthony B. (Coral Springs FL) Dorinski Dale W. (Coral Springs FL), Method of forming a three-dimensional printed circuit assembly.
  88. Aomori,Shigeru, Method of forming metallic wiring layer, method of selective metallization, apparatus for selective metallization and substrate apparatus.
  89. Heller Timmy B. ; Hill Ray M. ; Greenhalgh Michael R. ; Saggal Abdalla F., Method of making a solid three-dimensional article from a liquid medium.
  90. Smalley Dennis R. (Baldwin Park CA) Hull Charles W. (Santa Clarita CA), Method of making a three dimensional object by stereolithography.
  91. Allison Joseph W. (Valencia CA) Richter Jan (Los Angeles CA) Childers Craig M. (Santa Clarita CA) Smalley Dennis R. (Baldwin Park CA) Hull Charles W. (Santa Clarita CA) Jacobs Paul F. (La Crescenta C, Method of making a three-dimensional object by stereolithography.
  92. Allison Joseph W. (Valencia CA) Richter Jan (Los Angeles CA) Childers Craig M. (Santa Clarita CA) Smalley Dennis R. (Baldwin Park CA) Hull Charles W. (Santa Clarita CA) Jacobs Paul F. (La Crescenta C, Method of making a three-dimensional object by stereolithography.
  93. Allison Joseph W. (Valencia CA) Smalley Dennis R. (Baldwin Park CA) Hull Charles W. (Santa Clarita CA) Jacobs Paul F. (La Crescenta CA), Method of making a three-dimensional object by stereolithography.
  94. Childers Craig M. (Santa Clarita CA) Hull Charles W. (Santa Clarita CA), Method of making a three-dimensional object by stereolithography.
  95. Leedy Glenn Joseph, Method of making dielectrically isolated integrated circuit.
  96. Reiff David E. (Fort Lauderdale FL) Dorinski Dale W. (Coral Springs FL) Hunt Stephen D. (Davie FL), Method of manufacturing a three-dimensional plastic article.
  97. Noma Takashi (Hadano JPX) Kato Seijiro (Yokohama JPX) Kishi Fumio (Kanagawa-ken JPX) Kawade Hisaaki (Yokohama JPX) Ohnishi Toshikazu (Sagamihara JPX) Nishimura Michiyo (Sagamihara JPX) Uno Kumiko (Ur, Method of manufacturing electron-emitting device, electron source and image-forming apparatus.
  98. Cobbley, Chad A.; Brooks, Jerry M., Method of packaging semiconductor dice employing at least one redistribution layer.
  99. Senoo Hideo,JPX ; Sugino Takasi,JPX, Method of preventing transfer of adhesive substance to dicing ring frame, pressure-sensitive adhesive sheet for use in.
  100. Hull Charles W. (Arcadia CA), Method of production of three-dimensional objects by stereolithography.
  101. Wachtler, Kurt P., Method of separating semiconductor dies from a wafer.
  102. Hull Charles W. (Arcadia CA) Lewis Charles W. (Van Nuys CA), Methods and apparatus for production of three-dimensional objects by stereolithography.
  103. Hull Charles W. (Arcadia CA) Spence Stuart T. (South Pasadena CA) Albert David J. (Saratoga CA) Smalley Dennis R. (Baldwin Park CA) Harlow Richard A. (Malibu CA) Steinbaugh Phil (Mountain View CA) Ta, Methods and apparatus for production of three-dimensional objects by stereolithography.
  104. Modrek Borzo (Azusa CA), Methods and apparatus for production of three-dimensional objects by stereolithography.
  105. Smalley Dennis R. (Baldwin Park CA), Methods and apparatus for production of three-dimensional objects by stereolithography.
  106. Modrek Borzo (Azusa CA) Parker Brent (Newhall CA) Spence Stuart T. (S. Pasadena CA), Methods for curing partially polymerized parts.
  107. Akram,Salman, Methods for forming semiconductor devices so as to stabilize the same when positioned face-down over test substrates.
  108. Yokoyama,Yasuaki; Yonekura,Isamu; Satoh,Takashi; Wakasaki,Tamaki; Takeuchi,Yasumasa; Endo,Masayuki, Methods for forming wiring and electrode.
  109. Grigg, Ford B.; Ocker, James M.; Leininger, Rick A., Methods for labeling semiconductor device components.
  110. Badehi Pierre (Nataf 66 ; Mobile Post Harei Yehuda 90804 ILX), Methods for producing integrated circuit devices.
  111. Akram,Salman, Methods for protecting intermediate conductive elements of semiconductor device assemblies.
  112. Farnworth, Warren M., Methods for stereolithographic processing of components and assemblies.
  113. Hull Charles W. (Santa Clarita CA) Leyden Richard N. (Topanga Canyon CA) Sekowski Marek (Sherman Oaks CA), Methods of coating stereolithographic parts.
  114. Modrek Borzo (Azusa CA) Parker Brent (Newhall CA) Spence Stuart T. (S. Pasadena CA), Methods of curing partially polymerized parts.
  115. Farnworth, Warren M.; Duesman, Kevin G., Methods of fabricating housing structures and micromachines incorporating such structures.
  116. DiStefano Thomas H. ; Smith John W. ; Karavakis Konstantine N. ; Kovac Zlata ; Fjelstad Joseph, Methods of making microelectronic components having electrophoretically deposited layers.
  117. Thomas P. Glenn, Microcircuit die-sawing protector and method.
  118. Suzuki Motoyuki (Kyoto JPX) Uchida Tetsuo (Otsu JPX) Matsuura Kazuo (Otsu JPX), Microlens array sheet for a liquid crystal display, method for attaching the same and liquid crystal display equipped wi.
  119. Rhodes Howard E., Microlens array with improved fill factor.
  120. Wu,Ming Hsien; Paul,Kateri E.; Whitesides,George M., Microlens for projection lithography and method of preparation thereof.
  121. Ryan Timothy George,GBX ; Harvey Thomas Grierson,GBX, Multifunctional microstructures and preparation thereof.
  122. Keicher David M. ; Miller W. Doyle, Multiple beams and nozzles to increase deposition rate.
  123. Hatta Muneo (Itami JPX), Package for a light-responsive semiconductor chip.
  124. Tom A. Muntifering ; Steven W. Heppler ; Michael B. Ball, Packaging die preparation.
  125. Scranton Alec B. ; Rangarajan Bharath ; Baikerikar Kiran K., Photopolymerizable compositions for encapsulating microelectronic devices.
  126. Hung,Chia Yu; Huang,Chien Ping; Yang,Ke Chuan, Photosensitive semiconductor package and method for fabricating the same.
  127. Dierickx Bart,BEX ; Ricquier Nico,BEX, Pixel structure, image sensor using such pixel structure and corresponding peripheral circuitry.
  128. Muhlebach Andreas,CHX ; Hafner Andreas,CHX ; Van Der Schaaf Paul Adriaan,CHX, Polymerizable composition, process for producing cross-linked polymers and crosslinkable polymers.
  129. Miller W. Doyle ; Keicher David M. ; Essien Marcelino, Precision spray processes for direct write electronic components.
  130. Heinrich Meyer DE; Ralf Schulz DE, Process for plating metal coatings.
  131. Akram, Salman, Protective structure for bond wires.
  132. Akram, Salman, Protective structures for bond wires.
  133. Jensen Ronald J. ; Spielberger Richard K. ; Nguyen Toan Dinh ; Jacobsen William F., Radiation enhanced chip encapsulant.
  134. Vorgitch Thomas J. (Simi Valley CA) Bradford Raymond A. (Los Angeles CA) Floyd Grady O. (Newhall CA) Tarnoff Harry L. (Van Nuys CA) Vinson Wayne A. (Valencia CA) Little Frank F. (Lakeview CA) Harlow , Rapid and accurate production of stereolighographic parts.
  135. Vinson Wayne A. (Valencia CA) Little Frank F. (Lakeview CA) Schwarzinger Wolfgang (Moorpark CA) Lewis Mark A. (Valencia CA) Uziel Yehoram (Northridge CA) Pitlak Robert T. (Westlake Village CA) Spence, Rapid and accurate production of stereolithographic parts.
  136. Pennisi Robert W. (Boca Raton FL) Urbish Glenn F. (Coral Springs FL), Rapid product realization process.
  137. Earl Jocelyn M.,GBX ; Manners Chris R. ; Kerekes Thomas A. ; Marygold Paul H. ; Thayer Jeffrey S., Rapid prototyping system and method with support region data processing.
  138. Almquist Thomas A. ; Hull Charles W. ; Thayer Jeffrey S. ; Leyden Richard N. ; Jacobs Paul F. ; Smalley Dennis R., Rapid recoating of three-dimensional objects formed on a cross-sectional basis.
  139. Almquist Thomas A. (San Gabriel CA) Hull Charles W. (Santa Clarita CA) Modrek Borzo (Montebello CA) Jacobs Paul F. (La Crescenta CA) Lewis Charles W. (Sherman Oaks CA) Cohen Adam L. (Los Angeles CA) , Recoating of stereolithographic layers.
  140. Cohen Adam L. (Sherman Oaks CA), Resin film recoating method and apparatus.
  141. Akram, Salman, Semiconductor device packages including a plurality of layers substantially encapsulating leads thereof.
  142. Matsuki Hirohisa,JPX ; Kado Kenichi,JPX ; Watanabe Eiji,JPX ; Imamura Kazuyuki,JPX ; Yurino Takahiro,JPX, Semiconductor device with pad structure.
  143. Ono,Atsushi; Fujihara,Norito, Semiconductor device, module for optical devices, and manufacturing method of semiconductor device.
  144. Akram Salman, Semiconductor devices having protective layers thereon through which contact pads are exposed and stereolithographic methods of fabricating such semiconductor devices.
  145. Tsai, Yueh-Ying; Hung, Chin-Yuan; Chen, Chang-Fu, Semiconductor package.
  146. Chien-Ping Huang TW, Semiconductor package configuration based on lead frame having recessed and shouldered portions for flash prevention.
  147. Marc Meuris BE; Marc Heyns BE; Paul Mertens BE, Semiconductor processing method for processing discrete pieces of substrate to form electronic devices.
  148. Meuris Marc,BEX ; Mertens Paul,BEX ; Heyns Marc,BEX, Semiconductor processing system for processing discrete pieces of substrate to form electronic devices.
  149. Cuomo ; Jr. Salvatore Ralph (Wappingers Falls NY), Semiconductor wafer dicing fixture.
  150. Akram Salman, Semiconductor wafer processing method.
  151. Kruger Theodore R. ; Manners Chris R. ; Nguyen Hop D., Simplified stereolithographic object formation methods of overcoming minimum recoating depth limitations.
  152. Smalley Dennis R. (Baldwin Park CA) Vorgitch Thomas J. (Simi Valley CA), Simultaneous multiple layer curing in stereolithography.
  153. Connell, Mike; Jiang, Tongbi, Stacked semiconductor package with circuit side polymer layer.
  154. Lu Chih-Yuan,TWX, Step and repeat exposure method for loosening integrated circuit dice from a radiation sensitive adhesive tape backing.
  155. Cho Chan Seob (Kyungki-Do KRX) Chang Hwan Soo (Kyungki-Do KRX) Gil Myung Gun (Daejun-shi KRX), Stepper light control using movable blades.
  156. Spence Stuart T. (S. Pasadena CA) Lewis Charles W. (Van Nuys CA) Lewis Mark A. (Valencia CA), Stereolithographic apparatus and method.
  157. Hull Charles W. (Santa Clarita CA) Spence Stuart T. (So. Pasadena CA) Lewis Charles W. (Van Nuys CA) Vinson Wayne (Valenica CA) Freed Raymond S. (Northridge CA) Smalley Dennis R. (Baldwin Park CA), Stereolithographic curl reduction.
  158. Farnworth, Warren M.; Johnson, Mark S., Stereolithographic method and apparatus for packaging electronic components and resulting structures.
  159. Farnworth, Warren M., Stereolithographic method for applying materials to electronic component substrates and resulting structures.
  160. Williams, Vernon M., Stereolithographic methods for fabricating conductive elements.
  161. Farnworth, Warren M., Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages.
  162. Farnworth, Warren M., Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages.
  163. Warren M. Farnworth, Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages.
  164. Farnworth, Warren M.; Wood, Alan G., Stereolithographic methods for forming a protective layer on a semiconductor device substrate and substrates including protective layers so formed.
  165. Williams, Vernon M., Stereolithographic methods for securing conductive elements to contacts of semiconductor device components.
  166. Akram, Salman, Stereolithographic methods of fabricating semiconductor devices having protective layers thereon through which contact pads are exposed.
  167. Akram, Salman, Stereolithographic methods of fabricating semiconductor devices having protective layers thereon through which contact pads are exposed.
  168. Vernon M. Williams, Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods.
  169. Vernon M. Williams, Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods.
  170. Williams, Vernon M., Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods.
  171. Williams, Vernon M., Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods.
  172. Williams, Vernon M., Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods.
  173. Ford B. Grigg ; James M. Ocker ; Rick A. Leininger, Stereolithographically marked semiconductors devices and methods.
  174. Leyden Richard N. (Topanga CA) Almouist Thomas A. (San Gabriel CA) Lewis Mark A. (Valencia CA) Nguyen Hop D. (Little Rock CA), Stereolithography method and apparatus.
  175. Spence Stuart T. (S. Pasadena CA) Smalley Dennis R. (Baldwin Park CA), Stereolithography method and apparatus employing various penetration depths.
  176. Smalley Dennis R. (Baldwin Park CA) Nguyen Hop D. (Little Rock CA) Schmidt Kris A. (Granada Hills CA) Evans Herbert E. (Valencia CA) Freed Ray S. (Northridge CA) Jacobs Paul J. (La Crescenta CA), Surface resolution in three-dimensional objects by inclusion of thin fill layers.
  177. Warren M. Farnworth ; Kevin G. Duesman, Surface smoothing of stereolithographically formed 3-D objects.
  178. Gothait, Hanan, System and method for three dimensional model printing.
  179. Seki, Shunichi, System and methods for fabrication of a thin film pattern.
  180. Grigg, Ford B., Tape stiffener, semiconductor device component assemblies including same, and stereolithographic methods for fabricating same.
  181. Grigg, Ford B., Tape stiffener, semiconductor device component assemblies including same, and stereolithographic methods for fabricating same.
  182. Grigg, Ford B., Tape stiffener, semiconductor device component assemblies including same, and stereolithographic methods for fabricating same.
  183. Almquist Thomas A. (San Gabriel CA) Smalley Dennis R. (Baldwin Park CA), Thermal stereolighography.
  184. Almquist Thomas A. ; Smalley Dennis R., Thermal stereolithograp using slice techniques.
  185. Almquist Thomas A. (San Gabriel CA) Smalley Dennis R. (Baldwin CA), Thermal stereolithography.
  186. Almquist Thomas A. (San Gabriel CA) Smalley Dennis R. (Baldwin Park CA), Thermal stereolithography.
  187. Almquist Thomas A. (San Gabriel CA) Smalley Dennis R. (Baldwin Park CA), Thermal stereolithography.
  188. Almquist Thomas A. (San Gabriel CA) Smalley Dennis R. (Baldwin Park CA), Thermal stereolithography.
  189. Almquist Thomas A. (San Gabriel CA) Smalley Dennis R. (Baldwin Park CA), Thermal stereolithography.
  190. Larson Charles E. ; Murphy Timothy E. ; Taylor Bryan L. ; Long Jon M. ; Ellis Mark W. ; Riley Vincent L., Thin microelectronic substrates and methods of manufacture.
  191. Derderian, James M.; Draney, Nathan R., Thinned, strengthened semiconductor substrates and packages including same.
  192. Oleg Siniaguine ; Patrick B. Halahan ; Sergey Savastiouk, Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners.
  193. Fuerniss, Stephen J.; Johansson, Gary; Keesler, Ross W.; Lauffer, John M.; Markovich, Voya R.; Moschak, Peter A.; Russell, David J.; Wilson, William E., Through hole in a photoimageable dielectric structure with wired and uncured dielectric.
  194. Pratt Steven D. ; Muthuswamy Sivakumar ; Pennisi Robert W., Tooling die insert and rapid method for fabricating same.
  195. Farnworth, Warren M., Underfill and encapsulation of carrier substrate-mounted flip-chip components using stereolithography.
  196. Farnworth, Warren M., Underfill and encapsulation of carrier substrate-mounted flip-chip components using stereolithography.
  197. Jacobs Paul F. (La Crescenta CA) Thompson J. Scot (Northridge CA) Nguyen Hop D. (Little Rock CA) Smalley Dennis R. (Baldwin Park CA), Vibrationally enhanced stereolithographic recoating.
  198. Jacobs Paul F. (La Crescenta CA) Thompson J. Scot (Northridge CA) Nguyen Hop D. (Little Rock CA) Smalley Dennis R. (Baldwin Park CA), Vibrationally enhanced stereolithographic recoating.

이 특허를 인용한 특허 (3)

  1. Bae, JoHyun; Yoon, In Sang; Choi, DaeSik, Integrated circuit packaging system with package stacking.
  2. Bae, JoHyun; Yoon, In Sang; Choi, DaeSik, Integrated circuit packaging system with stack device.
  3. Shin, Dong-Woo; Han, Seong-Chan; Hwang, Sun-Kyu; Oh, Hyun-Jong; Oh, Nam-Yong, Semiconductor packaging device.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트