Semiconductor device and method of manufacturing the same
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-021/302
H01L-021/02
출원번호
UP-0224029
(2005-09-13)
등록번호
US-7550392
(2009-07-01)
우선권정보
JP-2005-169377(2005-06-09)
발명자
/ 주소
Komuro, Genichi
Kiuchi, Kenji
출원인 / 주소
Fujitsu Microelectronics Limited
대리인 / 주소
Westerman, Hattori, Daniels & Adrian, LLP.
인용정보
피인용 횟수 :
0인용 특허 :
6
초록▼
A semiconductor device manufacturing method, includes a step of forming a first alumina film (underlying insulating film) 37 on a semiconductor substrate 20, a step of forming a first conductive film 41, a ferroelectric film 42, and a second conductive film 43 in sequence on the first alumina film 3
A semiconductor device manufacturing method, includes a step of forming a first alumina film (underlying insulating film) 37 on a semiconductor substrate 20, a step of forming a first conductive film 41, a ferroelectric film 42, and a second conductive film 43 in sequence on the first alumina film 37, a step of forming a mask material film 45 on the second conductive film 43, a step of shaping the mask material film 45 into an auxiliary mask 45a, a step of shaping the second conductive film 43 into an upper electrode 43a by an etching using the auxiliary mask 45a and a first resist pattern 46 as a mask, a step of shaping the ferroelectric film 42 into a capacitor dielectric film 42a by patterning, and a step of shaping the first conductive film 41 into a lower electrode 41a by patterning, whereby a capacitor Q is constructed by the lower electrode 41, the capacitor dielectric film 42a, and the upper electrode 43a.
대표청구항▼
What is claimed is: 1. A semiconductor device manufacturing method, comprising: forming an underlying insulating film on a semiconductor substrate; forming a first conductive film, a ferroelectric film, and a second conductive film in sequence on the underlying insulating film; forming a mask mater
What is claimed is: 1. A semiconductor device manufacturing method, comprising: forming an underlying insulating film on a semiconductor substrate; forming a first conductive film, a ferroelectric film, and a second conductive film in sequence on the underlying insulating film; forming a mask material film on the second conductive film; forming a resist pattern on the mask material film; shaping the mask material film into an auxiliary mask, by etching the mask material film while using the resist pattern as a mask; shaping the second conductive film into an upper electrode, by subjecting the second conductive film to an isotropic etching while using the auxiliary mask and the resist pattern as a mask; removing the resist pattern; removing the auxiliary mask; shaping the ferroelectric film into a capacitor dielectric film by patterning; and shaping the first conductive film into a lower electrode by patterning the first conductive film, whereby constructing a capacitor from the lower electrode, the capacitor dielectric film, and the upper electrode. 2. A semiconductor device manufacturing method, according to claim 1, wherein a gas mixture consisting of a halogen gas and an inert gas is used as an etching gas in the etching of the second conductive film. 3. A semiconductor device manufacturing method, according to claim 1, wherein the etching of the second conductive film is performed by using an ICP (Inductively Coupled Plasma) etching equipment in which a quartz is employed as at least a part of a chamber. 4. A semiconductor device manufacturing method, according to claim 3, wherein the quartz constitutes a side wall of the chamber. 5. A semiconductor device manufacturing method, according to claim 3, wherein a gas mixture consisting of a halogen gas and an inert gas is supplied to the chamber as an etching gas, and a volumetric concentration of the inert gas in the etching gas is set to 60% or more in terms of flow rate ratio. 6. A semiconductor device manufacturing method, according to claim 1, wherein a film whose etching rate is lower than the resist pattern is formed as the mask material film. 7. A semiconductor device manufacturing method, according to claim 1, wherein the mask material film is formed to have a thickness of 50 nm or less. 8. A semiconductor device manufacturing method, according to claim 1, wherein a titanium nitride film or a titanium nitride aluminum film is used as the mask material film. 9. A semiconductor device manufacturing method, according to claim 1, wherein the removing of the auxiliary mask is performed by a wet etching using a mixed solution consisting of hydrogen peroxide and ammonium hydroxide as an etchant. 10. A semiconductor device manufacturing method, according to claim 1, further comprising: removing residues on the upper electrode by exposing the upper electrode to an oxygen plasma after the auxiliary mask is removed. 11. A semiconductor device manufacturing method, according to claim 1, further comprising: annealing the capacitor dielectric film in an oxygen atmosphere after the capacitor is constructed. 12. A semiconductor device manufacturing method, according to claim 1, further comprising: forming an interlayer insulating film to cover the capacitor after the capacitor is constructed. 13. A semiconductor device manufacturing method, according to claim 12, wherein, when shaping the first conductive film into the lower electrode by the patterning, a contact region of the lower electrode is formed to extend from the capacitor dielectric film, and further comprising, after forming the interlayer insulating film: forming a hole in the interlayer insulating film on the contact region of the lower electrode; and forming a conductive plug, which is connected electrically to the lower electrode, in the hole. 14. A semiconductor device manufacturing method, according to claim 1, wherein a noble metal film or a noble metal oxide film is formed as the second conductive film.
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