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A method of manufacturing an integrated circuit including a first isolated chip electrically and mechanically connected via wafer bonding to a second isolated chip, wherein the active faces of the chips face one another, includes: forming metallic contact zones on active faces of first and second wa

A method of manufacturing an integrated circuit including a first isolated chip electrically and mechanically connected via wafer bonding to a second isolated chip, wherein the active faces of the chips face one another, includes: forming metallic contact zones on active faces of first and second wafers, positioning and fixing the wafers one above another at a predetermined distance such that the active faces of the wafers face one another and the contact zones are aligned, placing the fixed wafers in a bath for electroless metal deposition onto the contact zones; and removing the fixed wafers in the event that the metal layers growing on the aligned contact zones of the first and second wafers have grown together.

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What is claimed is: 1. A method of manufacturing an integrated circuit including a first isolated chip electrically and mechanically connected via wafer bonding to a second isolated chip, wherein active faces of the chips face one another, the method comprising: forming metallic contact zones on ac

What is claimed is: 1. A method of manufacturing an integrated circuit including a first isolated chip electrically and mechanically connected via wafer bonding to a second isolated chip, wherein active faces of the chips face one another, the method comprising: forming metallic contact zones on active faces of first and second wafers such that, in the event the wafers are arranged one above the other and the active faces of the wafers are facing one another, the contact zones of the first wafer align with the contact zones of the second wafer; positioning and fixing at a first distance the first and second wafers one above the other with the active faces of the wafers facing one another and with the contact zones of the wafers aligned; placing the positioned and fixed first and second wafers into a bath for electrolessly depositing metal onto the contact zones; applying a seed layer on the metallic contact zones prior to placing the positioned and fixed first and second wafers in the electroless deposition bath and subsequent to positioning and fixing the first and second wafers one above the other; removing the positioned and fixed first and second wafers from the bath in the event metal layers growing on the aligned contact zones have grown together, thereby mechanically and electrically connecting at least one pair of chips of the first and second wafers; and isolating the at least one pair of electrically and mechanically connected chips from the wafers. 2. The method according to claim 1, wherein the seed layer is applied via sputtering to create a metal seed layer. 3. The method according to claim 1, further comprising: forming a photoresist spacer pattern on at least one of the first or second wafers prior to positioning the first and second wafer one above the other. 4. The method according to claim 1, wherein the first and second wafer are fixed at a first distance via clamping or adhesion. 5. The method according to claim 1, wherein the electroless metal deposition bath is a bath to deposit nickel or gold. 6. The method according to claim 1, wherein a metal deposition rate value over the faces, lying one above the other, of the first and second wafers is held substantially constant within a first tolerance range in the electroless deposition bath. 7. The method according to claim 1, wherein an essentially homogenous flow oriented in parallel with the wafer surface is generated in the electroless metal deposition bath. 8. A method of manufacturing an integrated circuit including a first isolated chip electrically and mechanically connected via wafer bonding to a second isolated chip, wherein active faces of the chips face one another, the method comprising: forming metallic contact zones on active faces of first and second wafers such that, in the event the wafers are arranged one above the other and the active faces of the wafers are facing one another, the contact zones of the first wafer align with the contact zones of the second wafer; positioning and fixing at a first distance the first and second wafers one above the other with the active faces of the wafers facing one another and with the contact zones of the wafers aligned; placing the positioned and fixed first and second wafers into a bath for electrolessly depositing metal onto the contact zones; applying a seed layer via zincate germination on the metallic contact zones prior to placing the positioned and fixed first and second wafers in the electroless deposition bath; removing the positioned and fixed first and second wafers from the bath in the event metal layers growing on the aligned contact zones have grown together, thereby mechanically and electrically connecting at least one pair of chips of the first and second wafers; and isolating the at least one pair of electrically and mechanically connected chips from the wafers. 9. The method according to claim 8, further comprising: forming a photoresist spacer pattern on at least one of the first or second wafers prior to positioning the first and second wafer one above the other. 10. The method according to claim 8, wherein a metal deposition rate value over the faces, lying one above the other, of the first and second wafers is held substantially constant within a first tolerance range in the electroless deposition bath. 11. The method according to claim 8, wherein an essentially homogenous flow oriented in parallel with the wafer surface is generated in the electroless metal deposition bath. 12. A method of manufacturing an integrated circuit including a first isolated chip electrically and mechanically connected via wafer bonding to a second isolated chip, wherein active faces of the chips face one another, the method comprising: forming metallic contact zones on active faces of first and second wafers such that, in the event the wafers are arranged one above the other and the active faces of the wafers are facing one another, the contact zones of the first wafer align with the contact zones of the second wafer; isolating the first chip from the first wafer; positioning and fixing at a first distance the first chip and the second wafer one above the other with the active face of the first chip and the active face of the second wafer facing one another and with the contact zones of the chip and wafer aligned; placing the positioned and fixed first chip and second wafer into a bath for electrolessly depositing metal onto the contact zones; applying a seed layer on the metallic contact zones prior to placing the positioned and fixed first chip and second wafer in the electroless deposition bath and subsequent to positioning and fixing the first chip and second wafer one above the other; removing the positioned and fixed first chip and second wafer from the bath in the event metal layers growing on the aligned contact zones have grown together, thereby mechanically and electrically connecting at least one pair of chips of the first chip and second wafer; and isolating the at least one pair of electrically and mechanically connected chips from the wafers. 13. The method according to claim 12, wherein the seed layer is applied via sputtering to create a metal seed layer. 14. The method according to claim 12, further comprising: forming a photoresist spacer pattern on at least one of the first chip or the second wafer prior to positioning the first chip and second wafer one above the other. 15. The method according to claim 12, wherein the first chip and second wafer are fixed at a first distance via clamping or adhesion. 16. The method according to claim 12, wherein the electroless metal deposition bath is a bath to deposit nickel or gold. 17. The method according to claim 12, further comprises: testing and determining that the first chip from the first wafer is good; and testing and determining that a second chip from the second wafer is good, prior to positioning and fixing the first chip and the second wafer one above the other. 18. The method according to claim 12, wherein a metal deposition rate value over the faces, lying one above the other, of the first chip and second wafer is held substantially constant within a first tolerance range in the electroless deposition bath. 19. The method according to claim 12, wherein an essentially homogenous flow oriented in parallel with the wafer surface is generated in the electroless metal deposition bath. 20. A method of manufacturing an integrated circuit including a first isolated chip electrically and mechanically connected via wafer bonding to a second isolated chip, wherein active faces of the chips face one another, the method comprising: forming metallic contact zones on active faces of first and second wafers such that, in the event the wafers are arranged one above the other and the active faces of the wafers are facing one another, the contact zones of the first wafer align with the contact zones of the second wafer; isolating the first chip from the first wafer; positioning and fixing at a first distance the first chip and the second wafer one above the other with the active face of the first chip and the active face of the second wafer facing one another and with the contact zones of the chip and wafer aligned; placing the positioned and fixed first chip and second wafer into a bath for electrolessly depositing metal onto the contact zones; applying a seed layer via zincate germination on the metallic contact zones prior to placing the positioned and fixed first chip and second wafer in the electroless deposition bath; removing the positioned and fixed first chip and second wafer from the bath in the event metal layers growing on the aligned contact zones have grown together, thereby mechanically and electrically connecting at least one pair of chips of the first chip and second wafer; and isolating the at least one pair of electrically and mechanically connected chips from the wafers. 21. The method according to claim 20, further comprising: forming a photoresist spacer pattern on at least one of the first chip or the second wafer prior to positioning the first chip and second wafer one above the other. 22. The method according to claim 20, further comprises: testing and determining that the first chip from the first wafer is good; and testing and determining that a second chip from the second wafer is good, prior to positioning and fixing the first chip and the second wafer one above the other. 23. The method according to claim 20, wherein a metal deposition rate value over the faces, lying one above the other, of the first chip and second wafer is held substantially constant within a first tolerance range in the electroless deposition bath. 24. The method according to claim 20, wherein an essentially homogenous flow oriented in parallel with the wafer surface is generated in the electroless metal deposition bath.