초록 ▼

The present invention provides a TFT including at least one LDD region in a self-alignment manner without forming a sidewall spacer and increasing the number of manufacturing steps. A photomask or a reticle provided with an assist pattern that is formed of a diffraction grating pattern or a semi-tra

The present invention provides a TFT including at least one LDD region in a self-alignment manner without forming a sidewall spacer and increasing the number of manufacturing steps. A photomask or a reticle provided with an assist pattern that is formed of a diffraction grating pattern or a semi-transmitting film and has a function of reducing light intensity is employed in a photolithography step of forming a gate electrode, an asymmetrical resist pattern having a region with a thick thickness and a region with a thickness thinner than that of the above region on one side is formed, a gate electrode having a stepped portion is formed, and an LDD region is formed in a self-alignment manner by injecting an impurity element to the semiconductor layer through the region with a thin thickness of the gate electrode.

대표청구항 ▼

What is claimed is: 1. A method for manufacturing a semiconductor device, the method comprising the steps of: forming a semiconductor layer over a substrate having an insulating surface, forming an insulating film over the semiconductor layer, forming a first conductive film over the insulating fil

What is claimed is: 1. A method for manufacturing a semiconductor device, the method comprising the steps of: forming a semiconductor layer over a substrate having an insulating surface, forming an insulating film over the semiconductor layer, forming a first conductive film over the insulating film, forming a second conductive film over the first conductive film, forming a resist pattern over the second conductive film, the resist pattern having a first portion and a second portion with a thickness thinner than that of the first portion, forming a gate electrode by selectively etching the first conductive film and the second conductive film, the gate electrode having a first portion and a second portion with a thickness thinner than that of the first portion, wherein the first portion of the gate electrode includes the first conductive film and the second conductive film, and wherein the second portion of the gate electrode includes the first conductive film, forming first impurity regions in the semiconductor layer on both sides of a channel formation region by injecting an impurity element into the semiconductor layer using the first portion and the second portion of the gate electrode as a mask, and forming a second impurity region in the semiconductor layer in a region overlapped with the second portion of the gate electrode by injecting an impurity element into the semiconductor layer through the second portion of the gate electrode. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the channel formation region overlaps with the first portion of the gate electrode, and wherein the channel formation region is disposed between one of the first impurity regions and the second impurity region. 3. The method for manufacturing a semiconductor device according to claim 1, wherein a conductive material of the first conductive film is different from a conductive material of the second conductive film. 4. The method for manufacturing a semiconductor device according to claim 1, wherein a cross-sectional shape of the resist pattern is asymmetrical in a width or a length direction of the gate electrode. 5. The method for manufacturing a semiconductor device according to claim 1, wherein the first impurity regions do not overlap with the gate electrode. 6. The method for manufacturing a semiconductor device according to claim 1, wherein a concentration of the impurity element of each of the first impurity regions is higher than a concentration of the impurity element of the second impurity region. 7. The method for manufacturing a semiconductor device according to claim 1, wherein the resist pattern is formed by using one of a photomask and a reticle, and wherein each of the photomask and the reticle has a diffraction grating pattern or a semi-transmitting portion. 8. A method for manufacturing a semiconductor device, the method comprising the steps of: forming a semiconductor layer over a substrate having an insulating surface, forming an insulating film over the semiconductor layer, forming a first conductive film over the insulating film, forming a second conductive film over the first conductive film, forming a resist pattern over the second conductive film, the resist pattern having a first portion and a second portion with a thickness thinner than that of the first portion, forming a gate electrode by selectively etching the first conductive film and the second conductive film, the gate electrode having a first portion and a second portion with a thickness thinner than that of the first portion, wherein the first portion of the gate electrode includes the first conductive film and the second conductive film, and wherein the second portion of the gate electrode includes the first conductive film, forming first impurity regions in the semiconductor layer on both sides of a channel formation region by injecting an impurity element into the semiconductor layer, and forming a second impurity region in the semiconductor layer in a region overlapped with the second portion of the gate electrode by injecting an impurity element into the semiconductor layer. 9. The method for manufacturing a semiconductor device according to claim 8, wherein the channel formation region overlaps with the first portion of the gate electrode, and wherein the channel formation region is disposed between one of the first impurity regions and the second impurity region. 10. The method for manufacturing a semiconductor device according to claim 8, wherein a conductive material of the first conductive film is different from a conductive material of the second conductive film. 11. The method for manufacturing a semiconductor device according to claim 8, wherein a cross-sectional shape of the resist pattern is asymmetrical in a width or a length direction of the gate electrode. 12. The method for manufacturing a semiconductor device according to claim 8, wherein the first impurity regions do not overlap with the gate electrode. 13. The method for manufacturing a semiconductor device according to claim 8, wherein a concentration of the impurity element of each of the first impurity regions is higher than a concentration of the impurity element of the second impurity region. 14. The method for manufacturing a semiconductor device according to claim 8, wherein the resist pattern is formed by using one of a photomask and a reticle, and wherein each of the photomask and the reticle has a diffraction grating pattern or a semi-transmitting portion. 15. A method for manufacturing a semiconductor device, the method comprising the steps of: forming a semiconductor layer over a substrate having an insulating surface, forming an insulating film over the semiconductor layer, forming a first conductive film over the insulating film, forming a second conductive film over the first conductive film, forming a resist pattern over the second conductive film, the resist pattern having a first portion and a second portion with a thickness thinner than that of the first portion, forming a gate electrode by selectively etching the first conductive film and the second conductive film, the gate electrode having a first portion and a second portion with a thickness thinner than that of the first portion, wherein the first portion of the gate electrode includes the first conductive film and the second conductive film, and wherein the second portion of the gate electrode includes the first conductive film, forming first impurity regions in the semiconductor layer by injecting an impurity element into the semiconductor layer using the first portion and the second portion of the gate electrode as a mask, and forming a second impurity region in the semiconductor layer by injecting an impurity element into the semiconductor layer through the second portion of the gate electrode. 16. The method for manufacturing a semiconductor device according to claim 15, wherein a channel formation region overlaps the first portion of the gate electrode, and wherein the channel formation region is disposed between one of the first impurity regions and the second impurity region. 17. The method for manufacturing a semiconductor device according to claim 15, wherein a conductive material of the first conductive film is different from a conductive material of the second conductive film. 18. The method for manufacturing a semiconductor device according to claim 15, wherein a cross-sectional shape of the resist pattern is asymmetrical in a width or a length direction of the gate electrode. 19. The method for manufacturing a semiconductor device according to claim 15, wherein the first impurity regions do not overlap with the gate electrode. 20. The method for manufacturing a semiconductor device according to claim 15, wherein a concentration of the impurity element of each of the first impurity regions is higher than a concentration of the impurity element of the second impurity region. 21. The method for manufacturing a semiconductor device according to claim 15, wherein the resist pattern is formed by using one of a photomask and a reticle, and wherein each of the photomask and the reticle has a diffraction grating pattern or a semi-transmitting portion.