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Hafnium tantalum oxide dielectrics 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/78
  • H01L-029/66
출원번호 UP-0735247 (2007-04-13)
등록번호 US-7602030 (2009-10-28)
발명자 / 주소
  • Ahn, Kie Y.
  • Forbes, Leonard
출원인 / 주소
  • Micron Technology, Inc.
대리인 / 주소
    Schwegman, Lundberg & Woessner, P.A.
인용정보 피인용 횟수 : 26  인용 특허 : 345

초록

A dielectric layer containing a hafnium tantalum oxide film and a method of fabricating such a dielectric layer produce a dielectric layer for use in a variety of electronic devices. Embodiments include structures for capacitors, transistors, memory devices, and electronic systems with dielectric la

대표청구항

What is claimed is: 1. An electronic device comprising: a substrate; a dielectric layer disposed above substrate, the dielectric layer having a hafnium tantalum oxide layer, the hafnium tantalum oxide being a bimetal oxide (HfxTayOz x>0, y>0, z>0), the hafnium tantalum oxide layer structur

이 특허에 인용된 특허 (345)

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  6. Gadgil, Prasad Narhar, Apparatus for atomic layer chemical vapor deposition.
  7. Ahn,Kie Y.; Forbes,Leonard, Atomic layer deposited HfSiON dielectric films wherein each precursor is independendently pulsed.
  8. Ahn,Kie Y.; Forbes,Leonard, Atomic layer deposited Zr-Sn-Ti-O films.
  9. Ahn, Kie Y.; Forbes, Leonard, Atomic layer deposited Zr-Sn-Ti-O films using TiI4.
  10. Ahn,Kie Y.; Forbes,Leonard, Atomic layer deposited ZrAlOdielectric layers including ZrAlO.
  11. Ahn,Kie Y.; Forbes,Leonard, Atomic layer deposited ZrTiOfilms.
  12. Ahn,Kie Y.; Forbes,Leonard, Atomic layer deposited dielectric layers.
  13. Ahn,Kie Y.; Forbes,Leonard, Atomic layer deposited lanthanide doped TiOx dielectric films.
  14. Ahn,Kie Y.; Forbes,Leonard, Atomic layer deposited nanolaminates of HfO/ZrOfilms as gate dielectrics.
  15. Ahn, Kie Y.; Forbes, Leonard, Atomic layer deposited nanolaminates of HfO2/ZrO2 films as gate dielectrics.
  16. Akram, Salman; Ahn, Kie Y.; Forbes, Leonard, Atomic layer deposition (ALD) high permeability layered magnetic films to reduce noise in high speed interconnection.
  17. Paranjpe,Ajit P.; Gopinath,Sanjay; Omstead,Thomas R.; Bubber,Randhir S.; Mao,Ming, Atomic layer deposition for fabricating thin films.
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  22. Gates Stephen McConnell ; Neumayer Deborah Ann, Atomic layer deposition with nitrate containing precursors.
  23. Ahn,Kie Y.; Forbes,Leonard, Atomic layer-deposited LaAlO3 films for gate dielectrics.
  24. Ahn,Kie Y.; Forbes,Leonard, Atomic layer-deposited hafnium aluminum oxide.
  25. Kori, Moris; Mak, Alfred W.; Byun, Jeong Soo; Lei, Lawrence Chung-Lai; Chung, Hua; Sinha, Ashok; Xi, Ming, Bifurcated deposition process for depositing refractory metal layers employing atomic layer deposition and chemical vapor deposition techniques.
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  27. Yang, Won-Suk; Hwang, Yoo-Sang; Jeong, Hong-Sik; Kim, Ki-Nam, Bit line landing pad and borderless contact on bit line stud with localized etch stop layer and manufacturing method thereof.
  28. Ahn, Kie Y.; Forbes, Leonard, Capacitor structure forming methods.
  29. Kashiwaya Makoto,JPX ; Nakada Junji,JPX, Carbon layer forming method.
  30. Kashiwaya, Makoto; Nakada, Junji, Carbon layer forming method.
  31. Forbes, Leonard; Ahn, Kie Y., Carburized silicon gate insulators for integrated circuits.
  32. Forbes, Leonard; Ahn, Kie Y., Carburized silicon gate insulators for integrated circuits.
  33. Lin Wen-Yi ; Speyer Robert F. ; Shrout Tom R. ; Hackenberger Wesley S., Ceramic compositions for microwave wireless communication.
  34. Sandhu Gurtej S. ; Fazan Pierre, Chemical vapor deposition using organometallic precursors.
  35. Leonard Forbes, Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device.
  36. Leonard Forbes, Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device.
  37. Leonard Forbes, Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device.
  38. Leonard Forbes, Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device.
  39. Forbes Leonard ; Geusic Joseph E. ; Ahn Kie Y., Circuits with a trench capacitor having micro-roughened semiconductor surfaces and methods for forming the same.
  40. Masujima Sho,JPX ; Miyauchi Eisaku,JPX ; Miyajima Toshihiko,JPX ; Watanabe Hideaki,JPX, Clean transfer method and apparatus therefor.
  41. Ahn, Kie Y.; Forbes, Leonard, Composite dielectric forming methods and composite dielectrics.
  42. Czubatyj Wolodymyr ; Ovshinsky Stanford R. ; Strand David A. ; Klersy Patrick ; Kostylev Sergey ; Pashmakov Boil, Composite memory material comprising a mixture of phase-change memory material and dielectric material.
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  45. Raaijmakers, Ivo; Haukka, Suvi P.; Granneman, Ernst H. A., Conformal thin films over textured capacitor electrodes.
  46. Farrar,Paul A.; Eldridge,Jerome M., Controlling diffusion in doped semiconductor regions.
  47. Ahn, Kie Y.; Forbes, Leonard, Copper technology for ULSI metallization.
  48. Ahn,Kie Y.; Forbes,Leonard, Crystalline or amorphous medium-K gate oxides, Y0and Gd0.
  49. Forbes Leonard ; Ahn Kie Y., Current mode signal interconnects and CMOS amplifier.
  50. Forbes, Leonard; Ahn, Kie Y., Current mode signal interconnects and CMOS amplifier.
  51. Forbes, Leonard; Ahn, Kie Y., Current mode signal interconnects and CMOS amplifier.
  52. Forbes, Leonard, DRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators.
  53. Forbes, Leonard, DRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators.
  54. Forbes,Leonard, DRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators.
  55. Cabral, Jr.,Cyril; Callegari,Alessandro C.; Gribelyuk,Michael A.; Jamison,Paul C.; Lacey,Dianne L.; McFeely,Fenton R.; Narayanan,Vijay; Neumayer,Deborah A.; Ranade,Pushkar; Zafar,Sufi, Deposition of hafnium oxide and/or zirconium oxide and fabrication of passivated electronic structures.
  56. Ahn,Kie Y.; Forbes,Leonard, Devices with HfSiON dielectric films which are Hf-O rich.
  57. Ahn,Kie Y.; Forbes,Leonard, Dielectric layer forming method and devices formed therewith.
  58. Marsh,Eugene P., Dielectric material forming methods.
  59. Baker, Frank Kelsey, Dielectric storage memory cell having high permittivity top dielectric and method therefor.
  60. Baker,Frank Kelsey, Dielectric storage memory cell having high permittivity top dielectric and method therefor.
  61. Leonard Forbes ; Wendell P. Noble ; Kie Y. Ahn, Discrete devices including EAPROM transistor and NVRAM memory cell with edge defined ferroelectric capacitance, methods for operating same, and apparatuses including same.
  62. Yang,Jean Y.; Erhardt,Jeff P.; Tabery,Cyrus; Qian,Weidong; Ramsbey,Mark T.; Park,Jaeyong; Kamal,Tazrien, Disposable hard mask for memory bitline scaling.
  63. Ahn, Kie; Forbes, Leonard, Doped aluminum oxide dielectrics.
  64. Ahn, Kie; Forbes, Leonard, Doped aluminum oxide dielectrics.
  65. Ma Yanjun ; Ono Yoshi, Doped zirconia, or zirconia-like, dielectric film transistor structure and deposition method for same.
  66. Nakamura Masayuki (Akishima JPX) Kawahara Takayuki (Hachiouji JPX) Kajigaya Kazuhiko (Iruma JPX) Oshima Kazuyoshi (Ohme JPX) Takahashi Tsugio (Ohme JPX) Otori Hiroshi (Ohme JPX) Matsumoto Tetsuro (Hi, Dynamic RAM and information processing system using the same.
  67. Fally Jacques,FRX, Dynamic distance and position sensor and method of measuring the distance and the position of a surface using a sensor.
  68. Leonard Forbes ; Luan C. Tran ; Alan R. Reinberg ; Joseph E. Geusic ; Kie Y. Ahn ; Paul A. Farrar ; Eugene H. Cloud ; David J. McElroy, Dynamic flash memory cells with ultra thin tunnel oxides.
  69. Forbes Leonard ; Tran Luan C. ; Reinberg Alan R. ; Geusic Joseph E. ; Ahn Kie Y. ; Farrar Paul A. ; Cloud Eugene H. ; McElroy David J., Dynamic flash memory cells with ultrathin tunnel oxides.
  70. Forbes Leonard ; Ahn Kie Y. ; Noble Wendell P. ; Reinberg Alan R., Dynamic random access memory (DRAM) cells with repressed ferroelectric memory methods of reading same, and apparatuses including same.
  71. Kawasaki, Ritsuko; Kasahara, Kenji; Ohtani, Hisashi, EL display device with a TFT.
  72. Kashihara Keiichiro (Hyogo JPX) Okudaira Tomonori (Hyogo JPX) Itoh Hiromi (Hyogo JPX), Electronic device using zirconate titanate and barium titanate ferroelectrics in insulating layer.
  73. Colombo,Luigi, Encapsulated MOS transistor gate structures and methods for making the same.
  74. Colombo,Luigi, Encapsulated MOS transistor gate structures and methods for making the same.
  75. Bojarczuk, Jr., Nestor A.; Cartier, Eduard A.; Guha, Supratik, Engineered high dielectric constant oxide and oxynitride heterostructure gate dielectrics by an atomic beam deposition technique.
  76. Ahn, Kiey Y.; Forbes, Leonard, Evaporated LaA1O3 films for gate dielectrics.
  77. Ahn, Kie Y.; Forbes, Leonard, Evaporation of Y-Si-O films for medium-K dielectrics.
  78. Ahn, Kie Y.; Forbes, Leonard, Evaporation of Y-Si-O films for medium-k dielectrics.
  79. Scobey Michael A. ; Zhang Xinxiong, External cavity semiconductor laser with monolithic prism assembly.
  80. Ahn, Kie Y.; Forbes, Leonard, Field emission display having porous silicon dioxide layer.
  81. Ahn, Kie Y.; Forbes, Leonard, Field emission display having reduced power requirements and method.
  82. Lee Peter W. ; Tsao Hsing-Ya,TWX ; Hsu Fu-Chang,TWX, Flash memory read/write controller.
  83. Forbes,Leonard; Eldridge,Jerome M., Flash memory with low tunnel barrier interpoly insulators.
  84. Yu, Bin; Wu, David, Formation of high-k gate dielectric layers for MOS devices fabricated on strained lattice semiconductor substrates with minimized stress relaxation.
  85. Ahn, Kie Y.; Forbes, Leonard, Formation of metal oxide gate dielectric.
  86. Kie Y. Ahn ; Leonard Forbes, Formation of metal oxide gate dielectric.
  87. Andrew T. Hunt ; Wen-Yi Lin ; Tzyy Jiuan Hwang ; Michelle Hendrick ; Helmut G. Hornis, Formation of thin film capacitors.
  88. Hunt Andrew T. ; Hwang Tzyy Jiuan ; Hornis Helmut G. ; Lin Wen-Yi, Formation of thin film capacitors.
  89. Hunt, Andrew T.; Hwang, Tzyy Jiuan; Hornis, Helmut G.; Lin, Wen-Yi, Formation of thin film capacitors.
  90. Hunt Andrew T. ; Flanagan John S. ; Neuman George A., Formation of this film capacitors.
  91. Ahn, Kie Y.; Forbes, Leonard, Gate oxides, and methods of forming.
  92. Forbes, Leonard; Eldridge, Jerome M., Graded composition gate insulators to reduce tunneling barriers in flash memory devices.
  93. Forbes, Leonard; Eldridge, Jerome M., Graded composition gate insulators to reduce tunneling barriers in flash memory devices.
  94. Eldridge,Jerome M.; Ahn,Kie Y.; Forbes,Leonard, Graded composition metal oxide tunnel barrier interpoly insulators.
  95. Eldridge,Jerome M.; Ahn,Kie Y.; Forbes,Leonard, Graded composition metal oxide tunnel barrier interpoly insulators.
  96. Werkhoven, Christiaan J.; Raaijmakers, Ivo; Haukka, Suvi P., Graded thin films.
  97. Kaushik, Vidya S.; Nguyen, Bich-yen; Pietambaram, Srinivas V.; Schaeffer, III, James Kenyon, High K dielectric film.
  98. Nguyen, Bich-Yen; Zhou, Hong-Wei; Wang, Xiao-Ping, High K dielectric film.
  99. Forbes, Leonard; Ahn, Kie Y., High performance silicon contact for flip chip.
  100. Forbes, Leonard; Ahn, Kie Y., High performance silicon contact for flip chip and a system using same.
  101. Forbes, Leonard; Ahn, Kie Y.; Akram, Salman, High permeability composite films to reduce noise in high speed interconnects.
  102. Forbes, Leonard; Ahn, Kie Y.; Akram, Salman, High permeability composite films to reduce noise in high speed interconnects.
  103. Forbes, Leonard; Ahn, Kie Y.; Akram, Salman, High permeability composite films to reduce noise in high speed interconnects.
  104. Forbes, Leonard; Ahn, Kie Y.; Akram, Salman, High permeability composite films to reduce noise in high speed interconnects.
  105. Forbes, Leonard; Ahn, Kie Y.; Akram, Salman, High permeability composite films to reduce noise in high speed interconnects.
  106. Forbes, Leonard; Ahn, Kie Y.; Akram, Salman, High permeability composite films to reduce noise in high speed interconnects.
  107. Forbes, Leonard; Ahn, Kie Y.; Akram, Salman, High permeability thin films and patterned thin films to reduce noise in high speed interconnections.
  108. Forbes, Leonard; Ahn, Kie Y.; Akram, Salman, High permeability thin films and patterned thin films to reduce noise in high speed interconnections.
  109. Colombo, Luigi; Chambers, James J.; Rotondaro, Antonio L. P.; Visokay, Mark R., High temperature interface layer growth for high-k gate dielectric.
  110. Colombo, Luigi; Quevedo-Lopez, Manuel; Chambers, James J.; Visokay, Mark R.; Rotondaro, Antonio L. P., High-k gate dielectric with uniform nitrogen profile and methods for making the same.
  111. Ahn, Kie Y.; Forbes, Leonard, High-quality praseodymium gate dielectrics.
  112. Park,Dae Gyu; Gluschenkov,Oleg G.; Gribelyuk,Michael A.; Wong,Kwong Hon, High-temperature stable gate structure with metallic electrode.
  113. Ahn,Kie Y.; Forbes,Leonard, Highly reliable amorphous high-k gate dielectric ZrON.
  114. Ahn, Kie Y.; Forbes, Leonard, Highly reliable amorphous high-k gate dielectric ZrOXNY.
  115. Ahn,Kie Y.; Forbes,Leonard, Highly reliable amorphous high-k gate oxide ZrO2.
  116. Ahn, Kie Y.; Forbes, Leonard, Highly reliable gate oxide and method of fabrication.
  117. Lee Seaung Suk,KRX ; Kim Ho Gi,KRX ; Kim Jong Choul,KRX ; Choi Soo Han,KRX, Hot-wall CVD method for forming a ferroelectric film.
  118. Forbes,Leonard, In service programmable logic arrays with low tunnel barrier interpoly insulators.
  119. Sarigiannis, Demetrius; Meng, Shuang; Derderian, Garo J., Insitu post atomic layer deposition destruction of active species.
  120. Forbes, Leonard; Eldridge, Jerome M.; Ahn, Kie Y., Integrated circuit memory device and method.
  121. Ahn, Kie Y.; Forbes, Leonard, Integrated decoupling capacitors.
  122. Arne W. Ballantine ; Douglas A. Buchanan ; Eduard A. Cartier ; Kevin K. Chan ; Matthew W. Copel ; Christopher P. D'Emic ; Evgeni P. Gousev ; Fenton Read McFeely ; Joseph S. Newbury ; Harald , Interfacial oxidation process for high-k gate dielectric process integration.
  123. Ahn,Kie Y.; Forbes,Leonard, Lanthanide doped TiOdielectric films.
  124. Ahn,Kie Y.; Forbes,Leonard, Lanthanide doped TiOdielectric films by plasma oxidation.
  125. Ahn, Kie Y.; Forbes, Leonard, Lanthanide doped TiOx dielectric films.
  126. Ahn, Kie Y.; Forbes, Leonard, Lanthanide doped TiOx dielectric films by plasma oxidation.
  127. Ahn,Kie Y.; Forbes,Leonard, Lanthanide doped TiOx dielectric films by plasma oxidation.
  128. Ahn,Kie Y.; Forbes,Leonard, Lanthanide oxide / hafnium oxide dielectric layers.
  129. Ahn,Kie Y.; Forbes,Leonard, Lanthanide oxide / hafnium oxide dielectric layers.
  130. Ahn,Kie Y.; Forbes,Leonard, Lanthanide oxide / hafnium oxide dielectrics.
  131. Ahn,Kie Y.; Forbes,Leonard, Lanthanide oxide dielectric layer.
  132. Ahn,Kie Y.; Forbes,Leonard, Lanthanide oxide/hafnium oxide dielectrics.
  133. Ahn,Kie; Forbes,Leonard, Lanthanide oxide/zirconium oxide atomic layer deposited nanolaminate gate dielectrics.
  134. Ahn,Kie Y.; Forbes,Leonard, Lanthanum hafnium oxide dielectrics.
  135. Maria, Jon-Paul; Kingon, Angus Ian, Lanthanum oxide-based dielectrics for integrated circuit capacitors.
  136. Maria, Jon-Paul; Kingon, Angus Ian, Lanthanum oxide-based gate dielectrics for integrated circuit field effect transistors.
  137. Ahn, Kie Y.; Forbes, Leonard, Low-temperature grown high quality ultra-thin CoTiO3 gate dielectrics.
  138. Ahn, Kie Y.; Forbes, Leonard, Low-temperature grown high-quality ultra-thin praseodymium gate dielectrics.
  139. Ahn,Kie Y.; Forbes,Leonard, Low-temperature growth high-quality ultra-thin praseodymium gate dieletrics.
  140. Cho, Hag-ju, METHODS OF MANUFACTURING INTEGRATED CIRCUIT DEVICES THAT INCLUDE A METAL OXIDE LAYER DISPOSED ON ANOTHER LAYER TO PROTECT THE OTHER LAYER FROM DIFFUSION OF IMPURITIES AND INTEGRATED CIRCUIT DEVICES M.
  141. Visokay,Mark; Colombo,Luigi, MOS transistor gates with doped silicide and methods for making the same.
  142. Utsunomiya Hajime (Nagano JPX) Uchiyama Kenji (Nagano JPX) Kosuda Masanori (Nagano JPX) Inoue Hiroyasu (Nagano JPX), Magneto-optical disc with intermediate film layer between a recording film and a dielectric film.
  143. Uchiyama Kenji (Nagano JPX) Fujioka Hirokazu (Nagano JPX) Shibahara Masanori (Nagano JPX), Magneto-optical disk.
  144. Uchiyama Kenji (Nagano JPX) Shibahara Masanori (Nagano JPX) Naganawa Michiki (Nagano JPX), Magneto-optical disk.
  145. Utsunomiya Hajime (Nagano JPX) Shibahara Masanori (Nagano JPX), Magneto-optical disk having lands and grooves for recording information.
  146. Utsunomiya Hajime (Nagano JPX), Magneto-optical recording medium.
  147. Utsunomiya Hajime (Nagano JPX) Uchiyama Kenji (Nagano JPX) Kosuda Masanori (Nagano JPX) Inoue Hiroyasu (Nagano JPX), Magneto-optical recording medium.
  148. Utsunomiya Hajime (Nagano JPX) Kosuda Masanori (Nagano JPX), Magnetooptical recording medium.
  149. Leonard Forbes ; Wendell P. Noble, Memory address decode array with vertical transistors.
  150. Evans ; Jr. Joseph T. (Albuquerque NM) Bullington Jeff A. (Albuquerque NM), Memory cell based on ferro-electric non volatile variable resistive element.
  151. Forbes Leonard ; Noble Wendell P. ; Ahn Kie Y., Memory cell with vertical transistor and buried word and body lines.
  152. Leonard Forbes ; Wendell P. Noble ; Kie Y. Ahn, Memory cell with vertical transistor and buried word and body lines.
  153. Poplingher Mircea ; Chen Wenliang ; Suryanarayanan Ganesh ; Chen Wayne W. ; Lo Roger Y., Memory device for a microprocessor register file having a power management scheme and method for copying information between memory sub-cells in a single clock cycle.
  154. Aronowitz,Sheldon; Zubkov,Vladimir; Sun,Grace S., Memory device having an electron trapping layer in a high-K dielectric gate stack.
  155. Muralidhar Ramachandran ; Subramanian Chitra K. ; Madhukar Sucharita ; White Bruce E. ; Sadd Michael A. ; Zafar Sufi ; O'Meara David L. ; Nguyen Bich-Yen, Memory device that includes passivated nanoclusters and method for manufacture.
  156. Ovshinsky Standford R. ; Czubatyj Wolodymyr ; Strand David A. ; Klersy Patrick J. ; Kostylev Sergey ; Pashmakov Boil, Memory element with memory material comprising phase-change material and dielectric material.
  157. Forbes,Leonard; Ahn,Kie Y., Memory utilizing oxide nanolaminates.
  158. Forbes,Leonard; Ahn,Kie Y., Memory utilizing oxide-conductor nanolaminates.
  159. Visokay, Mark; Colombo, Luigi; Chambers, James J., Metal gate MOS transistors and methods for making the same.
  160. Forbes,Leonard; Farrar,Paul A.; Ahn,Kie Y., Metal-substituted transistor gates.
  161. Ahn, Kie Y.; Forbes, Leonard, Method and apparatus for the fabrication of ferroelectric films.
  162. Kie Y. Ahn ; Leonard Forbes, Method and apparatus for the fabrication of ferroelectric films.
  163. Wang,Ming Fang; Chen,Chia Lin; Yang,Chih Wei; Chen,Chi Chun; Hou,Tuo Hung; Lin,Yeou Ming; Yao,Liang Gi; Chen,Shih Chang, Method and structure for forming high-k gates.
  164. Basceri, Cem; Gealy, Dan; Sandhu, Gurtej S., Method for controlling deposition of dielectric films.
  165. Farrar,Paul A.; Eldridge,Jerome M., Method for controlling diffusion in semiconductor regions.
  166. Chang, Jane; Lin, You-Sheng; Kepten, Avishai; Sendler, Michael; Levy, Sagy; Bloom, Robin, Method for depositing a coating having a relatively high dielectric constant onto a substrate.
  167. Conley, Jr., John F.; Ono, Yoshi; Solanki, Rajendra, Method for depositing a nanolaminate film by atomic layer deposition.
  168. Yamazaki, Shunpei; Arai, Yasuyuki, Method for fabricating a semiconductor device.
  169. Ramdani, Jamal; Droopad, Ravindranath; Yu, Zhiyi, Method for fabricating a semiconductor structure including a metal oxide interface with silicon.
  170. Kim, Younsoo, Method for fabricating metal electrode with atomic layer deposition (ALD) in semiconductor device.
  171. Rotondaro, Antonio L. P.; Visokay, Mark Robert; Chambers, James J.; Colombo, Luigi, Method for fabricating split gate transistor device having high-k dielectrics.
  172. Visokay,Mark R.; Colombo,Luigi; Chambers,James J.; Rotondaro,Antonio L. P.; Bu,Haowen, Method for fabricating transistor gate structures and gate dielectrics thereof.
  173. Messing, Gary L.; Kwon, Songtae; Sabolsky, Edward M., Method for fabrication of lead-based perovskite materials.
  174. Tarui Yasuo (No. 6-4 ; Minamisawa 5-chome Higashikurume City ; Tokyo JPX) Soutome Yoshihiro (Osaka JPX) Morita Shinichi (Yokosuka JPX) Tanimoto Satoshi (Tokyo JPX), Method for ferroelectric thin film production.
  175. Choi, Sung-Je, Method for forming a dielectric layer of a semiconductor device.
  176. Maiti Bikas ; Tobin Philip J. ; Hegde Rama I. ; Cuellar Jesus, Method for forming high dielectric constant metal oxides.
  177. Choi, Eun-Seok, Method for forming metal films.
  178. Kang Sang-bom,KRX ; Chae Yun-sook,KRX ; Park Chang-soo,KRX ; Lee Sang-in,KRX, Method for forming metal layer using atomic layer deposition.
  179. Cho, Ho Jin, Method for forming polyatomic layers.
  180. Ahn, Kie Y.; Forbes, Leonard, Method for forming single electron resistor memory.
  181. Ritala, Mikko; Rahtu, Antti; Leskela, Markku; Kukli, Kaupo, Method for growing thin oxide films.
  182. Ruff, Alexander; Kegel, Wilhelm; Karcher, Wolfram; Schrems, Martin, Method for increasing the capacitance in a storage trench.
  183. Rotondaro,Antonio L. P.; Mercer,Douglas E.; Colombo,Luigi; Visokay,Mark Robert; Bu,Haowen; Bevan,Malcolm John, Method for integrating high-k dielectrics in transistor devices.
  184. Ahn, Kie Y.; Forbes, Leonard, Method for making a ferroelectric memory transistor.
  185. Utsunomiya Hajime,JPX ; Kosuda Masanori,JPX ; Shingai Hiroshi,JPX, Method for making an optical recording medium.
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  217. Yoshi Ono ; Wei-Wei Zhuang ; Rajendra Solanki, Methods of using atomic layer deposition to deposit a high dielectric constant material on a substrate.
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  220. Yanjun Ma ; Yoshi Ono, Multilayer dielectric stack and method.
  221. Forbes, Leonard, Multilevel semiconductor-on-insulator structures and circuits.
  222. Forbes, Leonard, Nanocrystal write once read only memory for archival storage.
  223. Jin, Been-Yih; Arghavani, Reza; Chau, Robert, Non-silicon semiconductor and high-k gate dielectric metal oxide semiconductor field effect transistors.
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  278. Forbes, Leonard; Eldridge, Jerome M.; Ahn, Kie Y., Programmable array logic or memory devices with asymmetrical tunnel barriers.
  279. Forbes,Leonard; Eldridge,Jerome M.; Ahn,Kie Y., Programmable array logic or memory devices with asymmetrical tunnel barriers.
  280. Forbes,Leonard, Programmable memory address and decode circuits with low tunnel barrier interpoly insulators.
  281. Forbes,Leonard, Programmable memory address and decode circuits with low tunnel barrier interpoly insulators.
  282. Forbes, Leonard; Noble, Wendell P., Programmable memory address decode array with vertical transistors.
  283. Huang, Jen-Ren; Chou, Ming-Hung; Chiou, Jen-Ren, Programming a flash memory cell.
  284. Sneh Ofer, Radical-assisted sequential CVD.
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  286. Forbes, Leonard, SRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators.
  287. Howell, W. Max, SSICM guidance and control concept.
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  291. Forbes,Leonard; Ahn,Kie Y., Self aligned metal gates on high-k dielectrics.
  292. Forbes,Leonard; Ahn,Kie Y., Self aligned metal gates on high-k dielectrics.
  293. Chung, Jeong-hee; Park, In-sung; Yeo, Jae-hyun, Semiconductor capacitors having tantalum oxide layers.
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  295. Kawasaki,Ritsuko; Kasahara,Kenji; Ohtani,Hisashi, Semiconductor device and a method of manufacturing the same.
  296. Aoyama, Tomonori, Semiconductor device and manufacturing method therefor.
  297. Kawasaki, Ritsuko; Kasahara, Kenji; Ohtani, Hisashi, Semiconductor device and method of fabricating the same.
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  299. Ohmi,Tadahiro; Sugawa,Shigetoshi; Sekine,Katsuyuki; Saito,Yuji, Semiconductor device formed on (111) surface of a Si crystal and fabrication process thereof.
  300. Shunpei Yamazaki JP; Yasuyuki Arai JP, Semiconductor device having single crystal grains with hydrogen and tapered gate insulation layer.
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  302. Teraguchi Nobuaki,JPX, Semiconductor light-emitting device.
  303. Jamal Ramdani ; Ravindranath Droopad ; Lyndee L. Hilt ; Kurt William Eisenbeiser, Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same.
  304. Forbes Leonard ; Ahn Kie Y., Semiconductor-on-insulator memory cell with buried word and body lines.
  305. Smith Malcolm H., Sense amplifier for flash memory.
  306. Sherman, Arthur, Sequential chemical vapor deposition.
  307. Forbes,Leonard, Service programmable logic arrays with low tunnel barrier interpoly insulators.
  308. Forbes,Leonard, Service programmable logic arrays with low tunnel barrier interpoly insulators.
  309. Forbes,Leonard; Ahn,Kie Y.; Bhattacharyya,Arup, Silicon lanthanide oxynitride films.
  310. Ahn Kie Y. ; Forbes Leonard, Silicon multi-chip module packaging with integrated passive components and method of making.
  311. Fengyan Zhang ; Yanjun Ma ; Jer-Shen Maa ; Wei-Wei Zhuang ; Sheng Teng Hsu, Single c-axis PGO thin film on ZrO2 for non-volatile memory applications and methods of making the same.
  312. Bhattacharyya, Arup, Stable PD-SOI devices and methods.
  313. Ahn Kie Y. ; Forbes Leonard ; Cloud Eugene H., Structure and method for a high performance electronic packaging assembly.
  314. Ahn, Kie Y.; Forbes, Leonard; Cloud, Eugene H., Structure and method for a high-performance electronic packaging assembly.
  315. Ahn Kie Y. ; Forbes Leonard, Structure and method for dual gate oxide thicknesses.
  316. Ahn, Kie Y.; Forbes, Leonard, Structure and method for dual gate oxide thicknesses.
  317. Ahn, Kie Y.; Forbes, Leonard, Structure and method for dual gate oxide thicknesses.
  318. Ahn, Kie Y.; Forbes, Leonard, Structure and method for dual gate oxide thicknesses.
  319. Ahn, Kie Y.; Forbes, Leonard, Structures, methods, and systems for ferroelectric memory transistors.
  320. Marzolin,Christian; Marchal,Arnaud; Talpaert,Xavier, Substrate with a photocatalytic coating.
  321. Pomarede, Christophe F.; Roberts, Jeff; Shero, Eric J., Surface preparation prior to deposition.
  322. Vaartstra,Brian A., Systems and methods for forming metal oxides using alcohols.
  323. Vaartstra,Brian A.; Quick,Timothy A., Systems and methods for forming tantalum oxide layers and tantalum precursor compounds.
  324. Vaartstra,Brian A., Systems and methods of forming refractory metal nitride layers using disilazanes.
  325. Forbes, Leonard; Tran, Luan C.; Ahn, Kie Y., Technique to mitigate short channel effects with vertical gate transistor with different gate materials.
  326. Kashiwaya Makoto,JPX ; Nakata Junji,JPX, Thermal head.
  327. Kashiwaya Makoto,JPX ; Yoneda Junichi,JPX ; Noshita Taihei,JPX, Thermal head.
  328. Noshita Taihei,JPX, Thermal head.
  329. Yoneda Junichi,JPX, Thermal head.
  330. Yoneda Junichi,JPX ; Kashiwaya Makoto,JPX ; Noshita Taihei,JPX, Thermal head.
  331. Akira Yamaguchi JP, Thermal head adjusting method.
  332. Noshita Taihei,JPX ; Yoneda Junichi,JPX ; Kashiwaya Makoto,JPX, Thermal head and method of manufacturing the same.
  333. Kashiwaya Makoto,JPX ; Nakada Junji,JPX, Thermal head fabrication method.
  334. Kashiwaya, Makoto; Nakada, Junji, Thermal head lapping apparatus.
  335. Noshita Taihei,JPX ; Yoneda Junichi,JPX ; Kashiwaya Makoto,JPX, Thermal head method of manufacturing the same.
  336. Akira Yamaguchi JP, Thermal recording apparatus.
  337. Duenas Salvador ; Kola Ratnaji Rao ; Kumagai Henry Y. ; Lau Maureen Yee ; Sullivan Paul A. ; Tai King Lien, Thin film capacitors and process for making them.
  338. Quevedo Lopez,Manuel A.; Chambers,James J.; Colombo,Luigi; Visokay,Mark R., Top surface roughness reduction of high-k dielectric materials using plasma based processes.
  339. Eppich,Denise M.; Weimer,Ronald A., Transistor devices, and methods of forming transistor devices and circuit devices.
  340. Leonard Forbes ; Eugene H. Cloud ; Kie Y. Ahn, Transmission lines for CMOS integrated circuits.
  341. Klemperer, Walter G.; Lee, Jason; Mikalsen, Erik A.; Payne, David A., Ultrathin oxide films on semiconductors.
  342. Halliyal, Arvind; Ramsbey, Mark T.; Zhang, Wei; Randolph, Mark W.; Cheung, Fred T. K., Use of high-K dielectric material in modified ONO structure for semiconductor devices.
  343. Halliyal, Arvind; Ramsbey, Mark T.; Chang, Kuo-Tung; Tripsas, Nicholas H.; Ogle, Robert B., Use of high-k dielectric materials in modified ONO structure for semiconductor devices.
  344. Forbes Leonard, Vertical bipolar read access for low voltage memory cell.
  345. Forbes, Leonard, Write once read only memory employing charge trapping in insulators.

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  1. Ahn, Kie Y.; Forbes, Leonard, Apparatus having a lanthanum-metal oxide semiconductor device.
  2. Sandhu, Gurtej S.; Durcan, D. Mark, Devices with nanocrystals and methods of formation.
  3. Sandhu, Gurtej S.; Durcan, D. Mark, Devices with nanocrystals and methods of formation.
  4. Ramaswamy, D. V. Nirmal; Rocklein, Matthew N.; Brewer, Rhett, Fortification of charge storing material in high K dielectric environments and resulting apparatuses.
  5. Ramaswamy, D. V. Nirmal; Rocklein, Matthew N.; Brewer, Rhett T., Fortification of charge-storing material in high-K dielectric environments and resulting apparatuses.
  6. Ramaswamy, D. V. Nirmal; Rocklein, Matthew N.; Brewer, Rhett T., Fortification of charge-storing material in high-K dielectric environments and resulting apparatuses.
  7. Ahn, Kie Y.; Forbes, Leonard, Gallium lanthanide oxide films.
  8. Ahn, Kie Y.; Forbes, Leonard, Gallium lanthanide oxide films.
  9. Ahn, Kie Y.; Forbes, Leonard, Gallium lathanide oxide films.
  10. Gealy, Dan; Bhat, Vishwanath; Srividya, Cancheepuram V.; Rocklein, M. Noel, Graded dielectric layers.
  11. Gealy, Dan; Bhat, Vishwanath; Srividya, Cancheepuram V.; Rocklein, M. Noel, Graded dielectric structures.
  12. Gealy, F. Daniel; Bhat, Vishwanath; Srividya, Cancheepuram V.; Rocklein, M. Noel, Graded dielectric structures.
  13. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Hafnium lanthanide oxynitride films.
  14. Ahn, Kie Y.; Forbes, Leonard, Hafnium tantalum titanium oxide films.
  15. Ahn, Kie Y.; Forbes, Leonard, Hafnium tantalum titanium oxide films.
  16. Ahn, Kie Y.; Forbes, Leonard, Hafnium tantalum titanium oxide films.
  17. Ahn, Kie Y.; Forbes, Leonard, Methods of forming an insulating metal oxide.
  18. Ahn, Kie Y.; Forbes, Leonard, Methods of forming titanium silicon oxide.
  19. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Tantalum aluminum oxynitride high-K dielectric.
  20. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Tantalum silicon oxynitride high-K dielectrics and metal gates.
  21. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Tantalum silicon oxynitride high-K dielectrics and metal gates.
  22. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Tantalum silicon oxynitride high-k dielectrics and metal gates.
  23. Ahn, Kie Y.; Forbes, Leonard, Titanium aluminum oxide films.
  24. Ahn, Kie Y.; Forbes, Leonard, Zirconium-doped tantalum oxide films.
  25. Ahn, Kie Y.; Forbes, Leonard, Zirconium-doped tantalum oxide films.
  26. Ahn, Kie Y.; Forbes, Leonard, Zirconium-doped tantalum oxide films.
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