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Underlayer for high performance magnetic tunneling junction MRAM 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/8246
  • H01L-021/70
출원번호 UP-0881445 (2004-06-30)
등록번호 US-7611912 (2009-11-16)
발명자 / 주소
  • Hong, Liubo
  • Horng, Cheng
  • Chen, Mao Min
  • Tong, Ru Yin
출원인 / 주소
  • Headway Technologies, Inc.
대리인 / 주소
    Saile Ackerman LLC
인용정보 피인용 횟수 : 21  인용 특허 : 13

초록

An MRAM structure is disclosed in which the bottom electrode has an amorphous TaN capping layer to consistently provide smooth and dense growth for AFM, pinned, tunnel barrier, and free layers in an overlying MTJ. Unlike a conventional Ta capping layer, TaN is oxidation resistant and has high resist

대표청구항

We claim: 1. A method of forming an MRAM structure on a substrate, comprising: (a) forming a bottom electrode that is comprised of a seed layer on a substrate, a Ru, Rh, or Ir conductive layer on the seed layer, and an α-TaN capping layer on the conductive layer wherein the capping layer forms

이 특허에 인용된 특허 (13)

  1. Ashtiani, Kaihan A.; Biberger, Maximilian A.; Klawuhn, Erich R.; Lai, Kwok Fai; Levy, Karl B.; Rymer, J. Patrick, Apparatus and method for depositing superior Ta(N)/copper thin films for barrier and seed applications in semiconductor processing.
  2. Horng, Cheng T.; Tong, Ru-Ying, Bottom electrode for making a magnetic tunneling junction (MTJ).
  3. Bronner, Gary Bela; Gates, Stephen McConnell; Scheuerlein, Roy Edwin, Diode connected to a magnetic tunnel junction and self aligned with a metallic conductor and method of forming the same.
  4. Leuschner, Rainer, Layout for thermally selected cross-point MRAM cell.
  5. Slaughter Jon ; Shi Jing ; Chen Eugene ; Tehrani Saied, Magnetic element with improved field response and fabricating method thereof.
  6. Kentaro Nakajima JP; Koichiro Inomata JP; Yoshiaki Saito JP; Masayuki Sagoi JP, Magnetic memory device.
  7. Parkin, Stuart S. P.; Samant, Mahesh G., Magnetic random access memory with thermally stable magnetic tunnel junction cells.
  8. Dill Frederick Hayes ; Fontana ; Jr. Robert Edward ; Linn Tsann ; Parkin Stuart Stephen Papworth ; Tsang Ching Hwa, Magnetic tunnel junction memory cell with in-stack biasing of the free ferromagnetic layer and memory array using the cell.
  9. Ballantine, Arne W.; Cooney, III, Edward C.; Gilbert, Jeffrey D.; Miller, Robert G.; Myrick, Amy L.; Warren, Ronald A., Metal oxide temperature monitor.
  10. Ning, X. J., Method and manufacturing MRAM offset cells in a damascene structure.
  11. Sin, Kyusik; Bjelland, Kristian M.; Chen, Benjamin; Hiner, Hugh C.; Shi, Xizeng, Method and system for making TMR junctions.
  12. Motoyoshi, Makoto, Method of manufacturing magnetic memory device, and magnetic memory device.
  13. Tagami, Masayoshi; Hayashi, Yoshihiro, Multi-layered wiring layer and method of fabricating the same.

이 특허를 인용한 특허 (21)

  1. Bhosale, Prasad; Patlolla, Raghuveer R.; Rizzolo, Michael; Yang, Chih-Chao, Bottom electrode for MRAM applications.
  2. Xiao, Rongfu; Horng, Cheng T.; Tong, Ru-Ying; Torng, Chyu-Jinh; Zhong, Tom; Kula, Witold; Ko, Terry Kin Ting; Cao, Wei; Kan, Wai-Ming J.; Hong, Liubo, Bottom electrode for MRAM device.
  3. Li, Juntao; Wang, Junli; Yang, Chih-Chao, Contact having self-aligned air gap spacers.
  4. Yang, Chih-Chao; Edelstein, Daniel C.; Molis, Steven E., Enhanced diffusion barrier for interconnect structures.
  5. Yang, Chih-Chao; Edelstein, Daniel C.; Molis, Steven E., Enhanced diffusion barrier for interconnect structures.
  6. Chen, Hanhong; Fuchigami, Nobumichi; Hashim, Imran; Kumar, Pragati; Malhotra, Sandra; Shanker, Sunil, Fabrication of semiconductor stacks with ruthenium-based materials.
  7. Shimomura, Naoharu; Kitagawa, Eiji; Amano, Minoru; Saida, Daisuke; Yakushiji, Kay; Nozaki, Takayuki; Yuasa, Shinji; Fukushima, Akio; Imamura, Hiroshi; Kubota, Hitoshi, Magnetic memory.
  8. Shimomura, Naoharu; Kitagawa, Eiji; Amano, Minoru; Saida, Daisuke; Yakushiji, Kay; Nozaki, Takayuki; Yuasa, Shinji; Fukushima, Akio; Imamura, Hiroshi; Kubota, Hitoshi, Magnetic memory.
  9. Li, Xia; Kang, Seung H., Magnetic tunnel junction device and fabrication.
  10. Li, Xia; Kang, Seung H., Magnetic tunnel junction device and fabrication.
  11. Li, Xia; Kang, Seung Hyuk, Magnetic tunnel junction device and fabrication.
  12. Li, Xia; Kang, Seung H., Magnetic tunnel junction device fabrication.
  13. Xiao, Rongfu; Horng, Cheng T.; Tong, Ru-Ying; Torng, Chyu-Jinh; Zhong, Tom; Kula, Witold; Ko, Terry Kin Ting; Cao, Wei; Kan, Wai-Ming J.; Hong, Liubo, Process to fabricate bottom electrode for MRAM device.
  14. Hassan, Sameh Sayed Ali; McCafferty, Gabriel G.; Du, Yuqing; Ormston, Marcus, Seed trilayer for magnetic element.
  15. Kim, Juhyun; Kim, Kiwoong; Oh, Sechung; Lim, Woochang, Semiconductor device having magnetic tunnel junction structure and method of fabricating the same.
  16. Kim, Juhyun; Kim, Kiwoong; Oh, Sechung; Lim, Woochang, Semiconductor device having magnetic tunnel junction structure and method of fabricating the same.
  17. Tsukamoto, Keisuke; Tsujiuchi, Mikio, Semiconductor device including a magnetic tunnel junction and method of manufacturing the same.
  18. Tsukamoto, Keisuke; Tsujiuchi, Mikio, Semiconductor device including a magnetic tunnel junction and method of manufacturing the same.
  19. Park, Junghwan; Kim, Jonguk; Park, Soonoh; Lee, Jung Moo; Jung, Sugwoo, Semiconductor memory device.
  20. Yuan, Jun; Hong, Liubo; Chen, Mao-Min, Spacer structure in MRAM cell and method of its fabrication.
  21. Edelstein, Daniel C.; Li, Baozhen; Yang, Chih-Chao, Structure and process for W contacts.
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