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A method of forming a thermoelectric device includes extruding a P/N-type billet to form a P/N-type extrusion having a first plurality of P-type regions and a first plurality of N-type regions. The P/N-type extrusion is sliced into a plurality of P/N-type wafers. A diffusion barrier metallization is

A method of forming a thermoelectric device includes extruding a P/N-type billet to form a P/N-type extrusion having a first plurality of P-type regions and a first plurality of N-type regions. The P/N-type extrusion is sliced into a plurality of P/N-type wafers. A diffusion barrier metallization is applied to at least a subset of the P-type regions and N-type regions. One side of at least one P/N-type wafer is attached to a temporary substrate. The P/N-type regions of the P/N-type wafer are separated into an array of isolated P-type and N-type elements. The array of elements are coupled to a first plate having a first patterned metallization to form a thermoelectric circuit. The temporary substrate and bonding media may be detached from the P-type and N-type elements. The thermoelectric circuit may be coupled with a second plate at a second end of the thermoelectric circuit, second plate having a second patterned metallization.

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What is claimed is: 1. A method of forming a thermoelectric device, comprising: extruding a P/N-type billet to form a P/N-type extrusion; slicing the P/N-type extrusion into a plurality of P/N-type wafers, each having a first plurality of P-type regions and a first plurality of N-type regions; appl

What is claimed is: 1. A method of forming a thermoelectric device, comprising: extruding a P/N-type billet to form a P/N-type extrusion; slicing the P/N-type extrusion into a plurality of P/N-type wafers, each having a first plurality of P-type regions and a first plurality of N-type regions; applying diffusion barrier metallization to at least a subset of the P-type regions and N-type regions; attaching one side of at least one P/N-type wafer to a temporary substrate, using a bonding media; coupling the at least one P/N-type wafer to a first plate having a first patterned metallization to form a thermoelectric circuit, wherein the subset of P-type regions and N-type regions are arranged electrically in series and thermally in parallel; detaching the temporary substrate and bonding media from the at least one P/N-type wafer; and coupling the at least one P/N-type wafer to a second plate having a second patterned metallization. 2. The method of claim 1, wherein the P/N-type billet includes P-type regions and N-type regions, and separating layers disposed between the P-type regions and adjacent N-type regions. 3. The method of claim 1, further comprising separating the P/N-type regions of the P/N-type wafer into an array of isolated P-type and N-type elements while the wafer is attached to the temporary substrate. 4. The method of claim 3, wherein separating the P/N-type regions of the wafer into an array of isolated P-type and N-type elements comprises dicing the P/N-type regions of the P/N-type wafer. 5. The method of claim 3, wherein separating the P/N-type regions of the P/N-type wafer into an array of isolated P-type and N-type elements comprises abrading the P/N-type regions of the P/N-type wafer. 6. The method of claim 3, wherein separating the P/N-type regions of the P/N-type wafer into an array of isolated P-type and N-type elements comprises wet etching the P/N-type regions of the P/N-type wafer. 7. The method of claim 3, wherein separating the P/N-type regions of the P/N-type wafer into an array of isolated P-type and N-type elements comprises dry etching the P/N-type regions of the P/N-type wafer. 8. The method of claim 3, wherein separating the P/N-type regions of the P/N-type wafer into an array of isolated P-type elements and N-type elements comprises electrostatic discharge machining. 9. The method of claim 3, wherein separating the P/N-type regions of the P/N-type wafer into an array of isolated P-type elements and N-type elements comprises laser cutting. 10. The method of claim 1, wherein attaching one side of at least one P/N-type wafer to a temporary substrate, using a bonding media comprises attaching one side of at least one P/N-type wafer to a temporary substrate, using a bonding media between the P/N-type wafer and the temporary substrate to couple the P/N-type wafer to the temporary substrate. 11. A method of forming a thermoelectric device, comprising: providing a P/N-type ingot having a first plurality of P-type regions and a first plurality of N-type regions; slicing the P/N-type ingot into a plurality of P/N-type wafers; applying a diffusion barrier metallization to at least a first subset of the P-type regions and N-type regions; applying a first patterned current-carrying metallization to a first side of the P/N-type wafer to form a thermoelectric circuit; coupling the first side of at least one of the P/N-type wafers to a temporary substrate using a bonding media; thinning the P/N-type wafer to a desired height while the wafer is mounted on the temporary substrate; applying a second diffusion barrier metallization to at least a second subset of the P-type regions and N-type regions on a second side of the P/N-type wafer, while the wafer is mounted to the temporary substrate; applying a second patterned current-carrying metallization to the second side of the P/N-type wafer to form a thermoelectric circuit; separating at least a portion of the P/N-type regions of the wafer while the wafer is attached to the temporary substrate; and decoupling the thermoelectric device from the temporary substrate and the bonding media. 12. The method of claim 11, further comprising thermally coupling the thermoelectric device to one or more permanent substrates to provide electrical isolation. 13. The method of claim 11, further comprising extruding a P/N-type billet to form the P/N-type ingot. 14. The method of claim 11, further comprising hot rolling a P/N-type billet to form the P/N-type ingot. 15. The method of claim 11, further comprising hot forging a P/N-type billet to form the P/N-type ingot. 16. The method of claim 11, wherein separating the P/N-type regions of the wafer into an array of isolated P-type and N-type elements comprises dicing the P/N-type regions of the P/N-type wafer. 17. The method of claim 11, wherein separating the P/N-type regions of the P/N-type wafer into an array of isolated P-type and N-type elements comprises electrostatic discharge machining. 18. The method of claim 11, wherein separating the P/N-type regions of the wafer into an array of isolated P-type and N-type elements comprises laser cutting. 19. The method of claim 11, wherein separating the P/N-type regions of the P/N-type wafer into an array of isolated P-type and N-type elements comprises abrading the P/N-type regions of the P/N-type wafer. 20. The method of claim 11, wherein separating the P/N-type regions of the P/N-type wafer into an array of isolated P-type and N-type elements comprises wet etching the P/N-type regions of the P/N-type wafer. 21. The method of claim 11, wherein separating the P/N-type regions of the P/N-type wafer in to an array of isolated P-type and N-type elements comprises dry etching the P/N-type regions of the P/N-type wafer. 22. The method of claim 11, further comprising applying a thermally and electrically insulating material between the separated P/N-type regions of the thermoelectric device. 23. The method of claim 11, further comprising applying an electrically insulative, thermally conductive layer over the second side of the P/N-type wafer. 24. The method of claim 23, further comprising applying a metallization layer over the electrically insulative, thermally-conductive layer.