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Heat sink for a high capacity thin module system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/34
  • H01L-021/00
  • H05K-007/20
출원번호 UP-0258189 (2008-10-24)
등록번호 US-7626259 (2009-12-16)
발명자 / 주소
  • Wehrly, Jr., James Douglas
  • Wilder, James
  • Goodwin, Paul
  • Wolfe, Mark
출원인 / 주소
  • Entorian Technologies, LP
대리인 / 주소
    Fish & Richardson P.C.
인용정보 피인용 횟수 : 5  인용 특허 : 298

초록

Flexible circuitry is populated with integrated circuitry disposed along one or both of its major sides. Contacts distributed along the flexible circuitry provide connection between the module and an application environment. The circuit-populated flexible circuitry is disposed about an edge of a rig

대표청구항

The invention claimed is: 1. A circuit module comprising: (a) a rigid substrate having two opposing lateral sides and an edge and a window; (b) a flex circuit having first and second sides, the first side of the flex circuit having plural contacts adapted for connection to a circuit board socket an

이 특허에 인용된 특허 (298)

  1. Goodwin,Paul; Wehrly, Jr.,James Douglas, Active cooling methods and apparatus for modules.
  2. Kaneyama Hideyo (Tokyo JPX), Analog multiplexer.
  3. Mahulikar Deepak (Madison CT) Sagiv Efraim (Meriden CT) Parthasarathi Arvind (North Branford CT) Jalota Satish (Wallingford CT) Brock Andrew J. (Cheshire CT) Holmes Michael A. (Ripon CA) Schlater Jef, Anodized aluminum substrate having increased breakdown voltage.
  4. Karabatsos Chris, Apparatus and method for improving computer memory speed and capacity.
  5. Karabatsos Chris, Apparatus and method for terminating a computer memory bus.
  6. Tetsuya Fujisawa JP; Mitsutaka Sato JP; Seiichi Orimo JP; Kazuhiko Mitobe JP; Masaaki Seki JP; Masaki Waki JP; Toshio Hamano JP; Katsuhiro Hayashida JP; Yoshitsugu Katoh JP; Hiroshi Inoue J, Apparatus for a vertically accumulable semiconductor device with external leads secured by a positioning mechanism.
  7. Gates Frank Vernon, Apparatus for heat removal using a flexible backplane.
  8. Moshayedi Mark, Apparatus for stacking semiconductor chips.
  9. Foster, Sr.,Jimmy Grant; June,Michael S.; Makley,Albert Vincent; Matteson,Jason Aaron, Apparatus including a thermal bus on a circuit board for cooling components on a daughter card releasably attached to the circuit board.
  10. Akram, Salman; Wark, James M.; Hembree, David R., Apparatus providing redundancy for fabricating highly reliable memory modules.
  11. Bhakta, Jayesh R.; Pauley, Jr., Robert S., Arrangement of integrated circuits in a memory module.
  12. Bhakta, Jayesh R.; Pauley, Jr., Robert S., Arrangement of integrated circuits in a memory module.
  13. Johnson Randall E. (Carrollton TX) Drumm James M. (Dallas TX), Assembly of semiconductor chips.
  14. Mizutani Yoshitaka,JPX ; Washida Tetsuro,JPX, Bendable circuit board having improved resistance to bending strain and increased element mounting area.
  15. Buckley ; III Frederick (San Jose CA) Blomgren James S. (San Jose CA), Bi-planar multi-chip module.
  16. Karabatsos Chris, Bottom or top jumpered foldable electronic assembly.
  17. Smith, Gary W., Break away, high speed, folded, jumperless electronic assembly.
  18. Goodwin,Paul, Buffered thin module system and method.
  19. Roland Ochoa ; Joe Olson, Buffering circuit embedded in an integrated circuit device module used for buffering clocks and other input signals.
  20. Burns Carmen D. (10210 Holme-Lacey La. Austin ; Travis County TX 78750), Bus communication system for stacked high density integrated circuit packages having an intermediate lead frame.
  21. Blake Bruce E. (LaGrangeville NY) Hultmark Eric B. (Wappingers Falls NY) Presti Frank P. (Hopewell Junction NY) Ricci Raymond (Wappingers Falls NY) Rippens Roger A. (Salt Point NY), Ceramic card assembly having enhanced power distribution and cooling.
  22. Phy William S. (Los Altos CA) Early James M. (Palo Alto CA) Negus Kevien J. (Kingston CAX), Ceramic package for high frequency semiconductor devices.
  23. Frankeny Richard F. (Austin TX) Imken Ronald L. (Round Rock TX), Chip edge interconnect overlay element.
  24. Chih-Kung Huang TW; Shu-Hua Tseng TW, Chip scale package of semiconductor.
  25. Cady, James W.; Wilder, James; Roper, David L.; Wehrly, Jr., James Douglas; Dowden, Julian; Buchle, Jeff, Chip scale stacking system and method.
  26. Eide Floyd K. (Huntington Beach CA) Forthun John A. (Glendora CA) Isaak Harlan (Costa Mesa CA), Chip stack and method of making same.
  27. Isaak Harlan Ruben, Chip stack and method of making same.
  28. Park Myung Geun,KRX ; Park Chang Jun,KRX ; Lee Nam Soo,KRX ; Baik Hyung Gil,KRX ; Choi Yoon Hwa,KRX, Chip stack package utilizing a connecting hole to improve electrical connection between leadframes.
  29. Bruce, Ted; Forthun, John A., Chip stack with differing chip package types.
  30. Oppermann Hans-Hermann,DEX ; Zakel Elke,DEX ; Azdasht Ghassem,DEX ; Kasulke Paul,DEX, Chips arranged in plurality of planes and electrically connected to one another.
  31. Mizumo Yoshiyuki,JPX, Circuit board connection method and connection structure.
  32. Wehrly, Jr.,James Douglas; Wilder,James; Wolfe,Mark; Goodwin,Paul, Circuit module with thermal casing systems.
  33. Lauffer,John M.; Larnerd,James M.; Markovich,Voya R., Circuitized substrate with split conductive layer, method of making same, electrical assembly utilizing same, and information handling system utilizing same.
  34. Kollipara, Ravindranath T.; Nguyen, David; Haba, Belgacem, Clock routing in multiple channel modules and bus systems.
  35. Zachry Clyde L. (San Marcos CA), Coil connector.
  36. Marcinkiewicz Walter M. (Schenectady NY) Eichelberger Charles W. (Schenectady NY) Wojnarowski Robert J. (Ballston Lake NY), Compact high density interconnect structure.
  37. Ishikawa Takayuki (Amagasaki JPX) Santo Kouichi (Obama JPX), Composite flexible substrate.
  38. Vidal Ulrich,DEX, Composite member composed of at least two integrated circuits and method for the manufacture of a composite member composed of at least two integrated circuits.
  39. Krumweide Gary C. (Escondido CA) Krumweide Duane E. (Escondido CA) Clark Randy (San Diego CA), Composite structure for heat transfer and radiation.
  40. Clayton James E. (Derry NH) Shamash Hooshang (Chelmsford MA), Connecting apparatus for electrically connecting memory modules to a printed circuit board.
  41. Ramon S. Co ; Steve Si-Yu Chen ; Fred Yen Kong ; Thang Nguyen, Connector assembly for testing memory modules from the solder-side of a PC motherboard with forced hot air.
  42. Moser Lester J. (Scottsdale AZ), Coplanar waveguide semiconductor package.
  43. Cady,James W.; Goodwin,Paul, Die module system.
  44. Houseman David L. (Cary NC), Digital data processing system having object-based logical memory addressing and self-structuring modular memory.
  45. Benck Jeffrey W. (Delray Beach FL) Mansuria Mohanlal S. (Coral Springs FL) Wysong Robert D. (Boca Raton FL), Digitizer tablet having cooling apparatus with base and integrated heat sink.
  46. Laudon James P. (Menlo Park CA) Lenoski Daniel E. (San Jose CA) Manton John (Mountain View CA), Dimm pair with data memory and state memory.
  47. Corbett Tim J. (Boise ID) Wood Alan G. (Boise ID), Directly bonded board multiple integrated circuit module.
  48. Corbett Tim J. (Boise ID) Wood Alan G. (Boise ID), Directly bonded simm module.
  49. Gogal John F. (Lebanon NJ), Double cavity semiconductor chip carrier.
  50. Miniet Jay J. (Fort Lauderdale FL), Double-sided flexible electronic circuit module.
  51. Chris Karabatsos, Double-sided flexible jumper assembly and method of manufacture.
  52. Gaskins Darius D. (Austin TX) Holman ; Jr. Thomas H. (Austin TX) Longwell Michael L. (Austin TX) Matteson Keith D. (Austin TX) Parks Terry J. (Round Rock TX), Dual path memory retrieval system for an interleaved dynamic RAM memory unit.
  53. Dranchak David William ; Kelleher Robert Joseph ; Pagnani David Peter ; Zippetelli Patrick Robert, Dual substrate package assembly coupled to a conducting member.
  54. Difrancesco Louis (Hayward CA), Electrical interconnect using particle enhanced joining of metal surfaces.
  55. Travis Lawrence R. (Anaheim CA), Electrical jumper assembly.
  56. Cutting Lawrence R. ; Gaynes Michael A. ; Johnson Eric A. ; Milkovich Cynthia S. ; Perkins Jeffrey S. ; Pierson Mark V. ; Poetzinger Steven E. ; Zalesinski Jerzy, Electronic package assembly.
  57. Bentlage James R. (Binghamton NY) Engle David E. (Vestal NY) Mariner Geoffrey R. (Apalachin NY) Squires John J. (Endicott NY) Williams John H. (Endicott NY), Electronic package for high density applications.
  58. Benisek, Martin; Schober, Martin, Electronic printed circuit board having a plurality of identically designed, housing-encapsulated semiconductor memories.
  59. Akram, Salman; Wark, James M.; Hembree, David R., Electronic system including memory module with redundant memory capability.
  60. Pfeifer, David W.; Kasunich, John M., Elongated heat sink for use in converter assemblies.
  61. Ohtsuka, Yoshihiro; Oshino, Yasuhiro; Tanaka, Masaki, Epoxidized block copolymer, its production, and its composition.
  62. Wyland David C. (San Jose CA), Fast transmission gate switch.
  63. Nakatsuka Yasuo,JPX, Film carrier and laminate type mounting structure using same.
  64. Bodony Lawrence A. ; Bryan Richard ; Tseng Jack W., Flexible circuit assembly.
  65. Burns, Carmen D.; Roper, David; Cady, James W., Flexible circuit connector for stacked chip module.
  66. Klosowiak Tomasz (Glenview IL) Ghaem Sanjar (Palatine IL), Flexible substrate electronic assembly.
  67. Olson William L. (Lindenhurst IL) Currier David W. (Algonquin IL) Klosowiak Tomasz L. (Glenview IL) Fulcher Mark (Hanover Park IL), Flexible substrate folded in a U-shape with a rigidizer plate located in the notch of the U-shape.
  68. Mukerji Prosanto K. ; Thomas Ronald E. ; Hawkins George W. ; Srinivasan Rajesh ; Bosch Colin B. ; Knapp James H. ; Norton Laura J. ; Seddon Michael J., Flexible substrate for packaging a semiconductor component.
  69. Janik Craig M. (Palo Alto CA), Flexible wearable computer.
  70. Smith Gary W., Foldable electronic assembly module.
  71. Smith Gary W. (12376 Oakwood Rd. San Diego CA 92129) Karabatsos Chris (42 Jumping Brook La. Kingston NY 12401), Foldable electronic assembly module.
  72. Shigeki Kamei JP; Saeko Takagi JP, Foldable, flexible laminate type semiconductor apparatus with reinforcing and heat-radiating plates.
  73. Larson, Charles E., Folded interposer.
  74. Ingraham Anthony P. ; Kehley Glenn L. ; Sathe Sanjeev B. ; Slack John R., Free standing, three dimensional, multi-chip, carrier package with air flow baffle.
  75. Itoh Satomi (14-2-306 Asahigaoka-machi ; Ashiya-shi ; Hyogo JPX), Heat pipe.
  76. Nakamori Toshihiro,JPX, Heat-sinking arrangement for circuit elements.
  77. Burns Carmen D. (Austin TX), Hermetically sealed ceramic integrated circuit heat dissipating package.
  78. Wehrly, Jr.,James Douglas; Wilder,James; Goodwin,Paul; Wolfe,Mark, High capacity thin module system.
  79. Wehrly, Jr.,James Douglas; Wilder,James; Goodwin,Paul; Wolfe,Mark, High capacity thin module system.
  80. Goodwin,Paul, High capacity thin module system and method.
  81. Perry Michael (Mountain View CA) Yasumura Gary (Santa Clara CA), High density and high signal integrity connector.
  82. Burns, Carmen D., High density integrated circuit module.
  83. Burns Carmen D., High density integrated circuit module with complex electrical interconnect rails having electrical interconnect strain relief.
  84. Burns Carmen D. (Austin TX), High density lead-on-package fabrication method.
  85. Wu Andrew L. (Shrewsbury) Smelser Donald W. (Bolton) Bruce ; II E. William (Lunenburg MA) O\Dea John (Galway IRX), High density memory array packaging.
  86. Haj-Ali-Ahmadi Javad (Austin TX) Farrar Paul A. (South Burlington VT) Frankeny Jerome A. (Taylor TX) Frankeny Richard F. (Austin TX) Hermann Karl (Romulus NY) Shorter-Beauchamp Jacqueline A. (Austin , High density memory module.
  87. Pauley,Robert S.; Bhakta,Jayesh R.; Gervasi,William M.; Chen,Chi She; Delvalle,Jose, High density memory module using stacked printed circuit boards.
  88. Connolly Brian J. ; Kellogg Mark W. ; Hazelzet Bruce G., High density memory modules with improved data bus performance.
  89. McAllister Michael F. (Clintondale NY) McDonald James A. (Newburgh NY) Robbins Gordon J. (Wappingers Falls NY) Swaminathan Madhavan (Wappingers Falls NY) Wilkins Gregory M. (Poughkeepsie NY), High density memory structure.
  90. Bunnell Edward D. (Palm Harbor FL), High density mother/daughter circuit board connector.
  91. Cipolla Thomas M. (Katonah NY) Coteus Paul W. (Yorktown Heights NY) Derdall Brian C. (North York NY CAX) Knoedler Christina M. (Peekskill NY) Lanzetta Alphonso P. (Marlboro NY) Liutkus John J. (Yorkt, High density, high performance memory circuit package.
  92. Gow ; 3rd John (Milton VT) Noth Richard W. (Fairfax VT), High performance versatile thermally enhanced IC chip mounting.
  93. Smith Gary W., High speed memory module.
  94. Billy Wayne Garrett, Jr. ; Frederick Abbott Ware ; Craig E. Hampel ; Richard M. Barth ; Don Stark ; Abhijit Mukund Abhyankar ; Catherine Yuhjung Chen ; Thomas J. Sheffler ; Ely K. Tsern ; St, High speed memory system capable of selectively operating in non-chip-kill and chip-kill modes.
  95. Poradish Frank J. (Plano TX), High temperature co-fired ceramic integrated phased array package.
  96. Bhakta Jayesh R. ; Vakilian Kavous, High-density computer module with stacked parallel-plane packaging.
  97. Cloud Eugene H. ; Wood Alan G., High-density electronic module.
  98. Go Tiong C. (El Toro CA), High-density electronic modules - process and product.
  99. Kevin Kwong-Tai Chung, High-density electronic package, and method for making same.
  100. Laudon James P. ; Lenoski Daniel E. ; Manton John, High-memory capacity DIMM with data and state memory.
  101. Nakamura Tsuneshi (Hirakata JPX) Kikuchi Tatsuro (Kyoto JPX), Hybrid integrated circuit component and printed circuit board mounting said component.
  102. Suzuki Etsuji,JPX ; Yonezawa Akira,JPX ; Yamazaki Hidehisa,JPX ; Odaira Hiroshi,JPX, IC package having a single wiring sheet with a lead pattern disposed thereon.
  103. Eide Floyd K., IC stack utilizing BGA contacts.
  104. Eide Floyd K., IC stack utilizing secondary leadframes.
  105. Bates Warren A. (Winston-Salem NC) Johnson David C. (Winston-Salem NC) Volz Keith L. (Jamestown NC), Impedance controlled elastomeric connector.
  106. Bhatt Anilkumar Chinuprasad ; Glatzel Donald Herman ; Moring Allen F. ; Markovich Voya Rista ; Papathomas Kostas ; Russell David John, Information handling system with circuit assembly having holes filled with filler material.
  107. Uzuka, Yoshinori; Morita, Yoshihiro; Hanada, Koji; Murakami, Hajime; Masuda, Yasushi, Information-processing device having a crossbar-board connected to back panels on different sides.
  108. Kledzik Kenneth J. (Boise ID), Inherently impedance matched integrated circuit module.
  109. Eide Floyd (Huntington Beach CA), Integrated circuit chip stacking.
  110. Mouissie Bob (Berlicum NLX), Integrated circuit connector.
  111. Link Joseph (Carrollton TX), Integrated circuit package.
  112. McIver Chandler H. (Tempe AZ), Integrated circuit package.
  113. Akram Salman ; Farnworth Warren M., Integrated circuit package and method of fabrication.
  114. Perino Donald V. ; Dillon ; deceased John B., Integrated circuit package for coupling to a printed circuit board.
  115. Papageorge Marc V. (Boca Raton FL) Freyman Bruce J. (Boca Raton FL) Juskey Frank J. (Coral Spring FL) Thome John R. (Palatine IL), Integrated circuit package having a face-to-face IC chip arrangement.
  116. Cady, James W.; Wilder, James; Roper, David L.; Wehrly, Jr., James Douglas, Integrated circuit stacking system and method.
  117. Syri, Erich; Romer, Bernd, Integrated circuit with a housing accommodating the integrated circuit.
  118. Dodge Richard Charles ; Earl Kenneth Haskell ; Grise Gary D. ; Guild Douglas R. ; Loughner Karl D. ; Zalesinski Jerzy Maria, Integrated heat exchanger for memory module.
  119. Furuyama,Hideto; Hamasaki,Hiroshi, Interface module-mounted LSI package.
  120. Landis Richard C. (Shelton CT), Jumper for a semiconductor assembly.
  121. Burns Carmen D. (Austin TX), Lead-on-chip integrated circuit apparatus.
  122. Ueda Shiro,JPX ; Kumaoka Shunichi ; Sasuga Masumi,JPX ; Shibata Katsuhiko,JPX ; Igarashi Yoichi,JPX ; Kobayashi Naoto,JPX, Liquid crystal display device with reduced frame portion surrounding display area.
  123. Edward J. Kroliczek ; Kimberly R. Wrenn ; David A. Wolf, Sr., Loop heat pipe incorporating an evaporator having a wick that is liquid superheat tolerant and is resistant to back-conduction.
  124. Lim Thiam Beng,SGX, Low cost and highly reliable chip-sized package.
  125. Cady,James W.; Partridge,Julian; Wehrly, Jr.,James Douglas; Wilder,James; Roper,David L.; Buchle,Jeff, Low profile chip scale stacking system and method.
  126. Partridge,Julian; Cady,James W.; Wilder,James; Roper,David L.; Wehrly, Jr.,James Douglas, Low profile stacking system and method.
  127. Uya Masaru (Hirakata JPX), MOS register for selecting among various data inputs.
  128. Rapport, Russell; Cady, James W.; Wilder, James; Roper, David L.; Wehrly, Jr., James Douglas; Buchle, Jeff, Memory expansion and chip scale stacking system and method.
  129. Ikeda Kouichi,JPX, Memory module.
  130. Pao-Lung Lin TW; Nien-Tien Cheng TW; Heng-Chih Liu TW, Memory module.
  131. Shibata, Kayoko; Nishio, Yoji, Memory module.
  132. Tokunaga Muneharu,JPX ; Fukumoto Takakazu,JPX, Memory module.
  133. Dong, Lam S.; Doblar, Drew G., Memory module having balanced data I/O contacts pads.
  134. Lee, Dong Yang, Memory module having series-connected printed circuit boards.
  135. Se-Jin Kim KR; Sung-Ig Kang KR, Memory module system.
  136. Garrett, Jr., Billy Wayne; Ware, Frederick Abbott; Hampel, Craig E.; Barth, Richard M.; Stark, Don; Abhyankar, Abhijit Mukund; Chen, Catherine Yuhjung; Sheffler, Thomas J.; Tsern, Ely K.; Woo, Steven, Memory module with offset data lines and bit line swizzle configuration.
  137. Ali Hassanzadeh ; Victor Odisho, Memory module with offset notches for improved insertion and stability and memory module connector.
  138. Akram, Salman; Wark, James M.; Hembree, David R., Memory modules including capacity for additional memory.
  139. Paurus Floyd G. (Boulder CO) Szerlip Stanley R. (Longmont CO), Memory stack with an integrated interconnect and mounting structure.
  140. Richard E. Perego ; Stefanos Sidiropoulos ; Ely Tsern, Memory system including a point-to-point linked memory subsystem.
  141. North, David C.; Boyden, F. Demick, Memory system including guides that receive memory modules.
  142. Chris Karabatsos, Memory system using FET switches to select memory banks.
  143. Nielsen Michael J. K. ; Kindle Brian ; Gardner Linda S. ; Hussain Zahid S., Memory system with multiple addressing and control busses.
  144. Perino Donald V. ; Dillon John B., Method and apparatus for joining printed circuit boards.
  145. Desai Kishor V. (Vestal NY) Franchak Nelson P. (Binghamton NY) Katyl Robert H. (Vestal NY) Kohn Harold (Endwell NY) Sholtes Tamar A. (Endicott NY) Veeraraghavan Vilakkudi G. (Endicott NY) Woychik Cha, Method and apparatus for mounting a flexible film semiconductor chip carrier on a circuitized substrate.
  146. Akram Salman ; Wark James M. ; Hembree David R., Method and apparatus providing redundancy for fabricating highly reliable memory modules.
  147. Akram Salman ; Wark James M. ; Hembree David R., Method and apparatus providing redundancy for fabricating highly reliable memory modules.
  148. Akram Salman ; Wark James M. ; Hembree David R., Method and apparatus providing redundancy for fabricating highly reliable memory modules.
  149. Nakamura Koichiro (Yokohama JPX), Method for connecting electronic components with dummy patterns.
  150. King Jerrold L. (Boise ID) Moden Walter L. (Boise ID) Huang Chender (Boise ID), Method for producing high speed integrated circuits.
  151. Hagihara Takashi (Tokyo JPX), Method for producing semiconductor module.
  152. Forthun, John A.; Gordon, Mark G., Method of assembling a stackable integrated circuit chip.
  153. Rostoker Michael D. ; Schneider Mark R. ; Fulcher Edwin, Method of assembling ball bump grid array semiconductor packages.
  154. Akram Salman, Method of fabricating a multi-chip module.
  155. Go ; deceased Tiong C. (late of El Toro CA by Jane C. Go ; executor) Minahan Joseph A. (Simi Valley CA) Shanken Stuart N. (Laguna Niguel CA), Method of fabricating electronic circuitry unit containing stacked IC layers having lead rerouting.
  156. Chou William T. ; Beilin Solomon I. ; Lee Michael Guang-Tzong ; Peters Michael G. ; Wang Wen-Chou Vincent, Method of fabrication of multiple-layer high density substrate.
  157. Clayton James E., Method of forming a thin multichip module.
  158. McMahon John F. (Phoenix AZ), Method of making an electronic assembly having a flexible circuit wrapped around a substrate.
  159. Burns Carmen D., Method of manufacturing a surface mount package.
  160. Pan, Alfred I-Tsung, Method of processing a device by electrophoresis coating.
  161. Nakano Tsuyoshi (Tokyo JPX), Method of stacking printed circuit boards.
  162. Warren M. Farnworth ; Alan G. Wood ; Mike Brooks, Method of wafer level chip scale packaging.
  163. Janzen, Jeffery W.; Johnson, Christopher S., Methods and apparatuses for transferring heat from microelectronic device modules.
  164. Steven C. Woo ; Craig E. Hampel, Methods and systems for reducing heat flux in memory systems.
  165. Woo, Steven C.; Hampel, Craig E., Methods and systems for reducing heat flux in memory systems.
  166. Woo, Steven C.; Hampel, Craig E., Methods and systems for reducing heat flux in memory systems.
  167. Haj-Ali-Ahmadi Javad (Austin TX) Frankeny Richard F. (Austin TX) Hermann Karl (Austin TX), Modular electronic packaging system.
  168. Levy Aaron Uri ; Sprint John Patrick ; Forthun John Arthur ; Isaak Harlan Ruben ; Mearig Joel Andrew ; Calkins Mark Chandler, Modular panel stacking process.
  169. Carson John C. (Corona del Mar CA) Indin Ronald J. (Huntington Beach CA) Shanken Stuart N. (Irvine CA), Module comprising IC memory stack dedicated to and structurally combined with an IC microprocessor chip.
  170. Kodai Shojiro (Hyogo JPX) Ochi Katsunori (Hyogo JPX) Murakami Osamu (Hyogo JPX), Molded IC card.
  171. Kong, Eun Youp; Jeon, Jun Young; Shon, Hai Jeong; Park, Chul Hong, Multi-chip memory devices and modules including independent control of memory chips.
  172. Cipolla Thomas M. (Katonah NY) Coteus Paul W. (Yorktown Heights NY) Johnson Glen W. (Yorktown Heights NY) Mok Lawrence S. (Brewster NY), Multi-chip module.
  173. Fukuoka Yoshitaka,JPX, Multi-chip module and production method thereof.
  174. Bollesen Vernon P., Multi-chip module with flexible circuit board.
  175. Shim, Il Kwon; DiCaprio, Vincent, Multi-stacked memory package.
  176. Johnson Dean A. ; Laubengayer William R. ; Richardson Stephen G., Multiple circuit board assembly having an interconnect mechanism that includes a flex connector.
  177. Ameen Joseph G. (Apalachin NY) Funari Joseph (Vestal NY) Sissenstein ; Jr. David W. (Endwell NY), Mutlilayered flexible circuit package.
  178. Lin Paul T. (Austin TX) McShane Michael B. (Austin TX), Overmolded semiconductor device having solder ball and edge lead connective structure.
  179. Zappacosta Elisa E ; Rapaich Mark, PCB module support system.
  180. Tandy Patrick W., Package stack via bottom leaded plastic (BLP) packaging.
  181. Moon, Ow Chee, Packaged microelectronic die assemblies and methods of manufacture.
  182. Cipolla Thomas M. (Katonah NY) Coteus Paul W. (Yorktown Heights NY) Damianakis Ioannis (Montreal NY CAX) Johnson Glen W. (Yorktown Heights NY) Ledermann Peter G. (Peekskill NY) Matthew Linda C. (Peek, Packages for stacked integrated circuit chip cubes.
  183. Wood Alan G. (Boise ID) Corbett Tim J. (Boise ID), Packaging for semiconductor logic devices.
  184. Johnson Thomas (1936 Highland Northbrook IL 60062), Packaging system for multiple semiconductor devices.
  185. Carlson Randolph S. (Carson City NV), Packaging system for stacking integrated circuits.
  186. Ishii Hideki,JPX, Packed semiconductor device with wrap around external leads.
  187. Harlan R. Isaak, Panel stacking of BGA devices to form three-dimensional modules.
  188. Isaak, Harlan R., Panel stacking of BGA devices to form three-dimensional modules.
  189. Isaak, Harlan R.; Ross, Andrew C.; Roeters, Glen E., Panel stacking of BGA devices to form three-dimensional modules.
  190. Isaak, Harlan R.; Ross, Andrew C.; Roeters, Glen E., Panel stacking of BGA devices to form three-dimensional modules.
  191. Kobayashi Shigeo (San Jose CA), Personal processor module and docking station for use therewith.
  192. Roper,David L.; Cady,James W.; Wilder,James; Wehrly, Jr.,James Douglas; Buchle,Jeff; Dowden,Julian, Pitch change and chip scale stacking system.
  193. Funari Joseph (Vestal NY) Godown Terence C. (Endwell NY) Reynolds Scott D. (Endwell NY) Sammakia Bahgat G. (Johnson City NY), Pluggable electronic circuit package assembly with snap together heat sink housing.
  194. Yanagida Keiichirou,JPX, Printed-wiring board having plural parallel-connected interconnections.
  195. Brehm Gerhard (Emmerting DEX) Haller Ingo (Burghausen DEX) Rothenaicher Otto (Gumpersdorf DEX) Langsdorf Karl H. (Burghausen DEX), Process and apparatus for abrasive machining of a wafer-like workpiece.
  196. Hormazdyar M. Dalal ; Gene Joseph Gaudenzi ; Rebecca Y. Gorrell ; Mark A. Takacs ; Kenneth J. Travis, Jr., Process of forming a capacitor with multi-level interconnection technology.
  197. McMahon John F. (Phoenix AZ), Ra-tab array bump tab tape based I.C. package.
  198. Wen-chou Vincent Wang ; Michael G. Lee ; Solomon Beilin, Reduced stress and zero stress interposers for integrated-circuit chips, multichip substrates, and the like.
  199. Ishii Hideki,JPX, Reduced thickness semiconductor device with IC packages mounted in openings on substrate.
  200. Stopperan Jahn J. (Lakeville MN), Rigid-flex board with anisotropic interconnect and method of manufacture.
  201. Canter, Donald C.; Watts, Michael A., Rugged modular PC 104 chassis with blind mate connector and forced convection cooling capabilities.
  202. Dell Timothy Jay ; Kellogg Mark William ; Hazelzet Bruce Gerard, SIMM/DIMM memory module.
  203. Stewart,Thomas E.; Olesiewicz,Timothy W., Self-installing heat sink.
  204. King Jerrold L. (Boise ID) Brooks Jerry M. (Boise ID) Farnworth Warren M. (Nampa ID) McGill George P. (Boise ID), Semiconductor assembly utilizing elastomeric single axis conductive interconnect.
  205. Kondo, Yoichiro, Semiconductor device.
  206. Konishi Akira (Kyoto JPX) Wakano Teruo (Kyoto JPX), Semiconductor device and its manufacture.
  207. Masayasu Kawamura JP; Atsushi Nakamura JP; Yoshihiro Sakaguchi JP; Yoshitaka Kinoshita JP; Yasushi Takahashi JP; Yoshihiko Inoue JP, Semiconductor device and memory module.
  208. Nobuaki Hashimoto JP, Semiconductor device and method manufacturing the same, circuit board, and electronic instrument.
  209. Nobuaki Hashimoto JP, Semiconductor device and method of manufacturing the same, manufacturing device, circuit board, and electronic equipment.
  210. Sugano Toshio,JPX ; Tsukui Seiichiro,JPX ; Tsuneda Kensuke,JPX, Semiconductor device and process for manufacturing the same.
  211. Sugano Toshio,JPX ; Tsukui Seiichiro,JPX ; Tsuneda Kensuke,JPX, Semiconductor device and process for manufacturing the same.
  212. Sugano, Toshio; Tsukui, Seiichiro; Tsuneda, Kensuke, Semiconductor device and process for manufacturing the same.
  213. Tomita Yoshihiro,JPX, Semiconductor device comprising stacked semiconductor elements.
  214. Yoshihiro Tomita JP; Shinji Baba JP, Semiconductor device having a chip, reinforcing plate, and sealing material sharing a common rear surface.
  215. Fukatsu, Kenta; Saito, Yasuhito; Arakawa, Masayuki; Iguchi, Tomohiro; Watanabe, Naotake; Fukuchi, Yoshitoshi; Komatsu, Tetsuro, Semiconductor device having a plurality of stacked wiring boards.
  216. Hatano Kazuhisa,JPX ; Ohtaka Tatsuya,JPX ; Yonemoto Takaharu,JPX ; Yoshioka Osamu,JPX ; Murakami Gen,JPX, Semiconductor device having lead on chip structure.
  217. Akasaki Hidehiko (Aizuwakamatsu JPX) Tsujimura Takehisa (Kawasaki JPX), Semiconductor device including leadless packages and a base plate for mounting the leadless packages.
  218. Normington Peter J. C. (516 E. Country Plaza South Gilbert AZ 85234), Semiconductor device including stacked die.
  219. Normington Peter J. C. (516 E. Country Plaza South Gilbert AZ 85234), Semiconductor device including stacked die.
  220. Chambers Benjamin C. ; Blood ; Jr. William R. ; Lee Tien-Yu T., Semiconductor device package and method.
  221. Marchisi Giuseppe (Milan ITX), Semiconductor device package with dies mounted on both sides of the central pad of a metal frame.
  222. Tsuneda, Kensuke; Sugano, Toshio; Tsukui, Seiichiro; Nagaoka, Kouji; Sato, Tomohiko, Semiconductor device, a semiconductor module loaded with said semiconductor device and a method of manufacturing said semiconductor device.
  223. Watanabe Masayuki (Yokohama JPX) Sugano Toshio (Kokubunji JPX) Tsukui Seiichiro (Komoro JPX) Ono Takashi (Akita JPX) Wakashima Yoshiaki (Kawasaki JPX), Semiconductor integrated circuit device and method of manufacturing the same.
  224. Hamamatsu, Akihito; Tanaka, Shinji, Semiconductor memory device shiftable to test mode in module as well as semiconductor memory module using the same.
  225. Hennig, Petra; Bonati, Guido; Rollig, Ulrich; Lorenzen, Dirk, Semiconductor module.
  226. Belgacem Haba, Semiconductor module with imbedded heat spreader.
  227. Matsuura, Tetsuya, Semiconductor module with semiconductor devices attached to upper and lower surface of a semiconductor substrate.
  228. Belgacem, Haba, Semiconductor module with serial bus connection to multiple dies.
  229. Russell Ernest J. (Richmond TX), Semiconductor package having interdigitated leads.
  230. Tadayoshi Miyoshi JP, Semiconductor package having semiconductor element mounting structure of semiconductor package mounted on circuit board and method of assembling semiconductor package.
  231. Farnworth Warren M. ; Wood Alan G. ; Brooks Mike, Semiconductor package including flex circuit, interconnects and dense array external contacts.
  232. Warren M. Farnworth ; Alan G. Wood ; Mike Brooks, Semiconductor package including flex circuit, interconnects and dense array external contacts.
  233. Otake Kenichi,JPX ; Bonkohara Manabu,JPX, Semiconductor package with flexible board and method of fabricating the same.
  234. Lin Paul T. (Austin TX), Semiconductor packaging and method.
  235. Bertin Claude L. (South Burlington VT) Hedberg Erik L. (Essex Junction VT) Howell Wayne J. (South Burlington VT), Semiconductor stack structures and fabrication/sparing methods utilizing programmable spare circuit.
  236. Nakayama Iwao (Nagano JPX), Semiconductor with a battery unit.
  237. Stephen G. Gonya, Signal cross-over interconnect for a double-sided circuit card assembly.
  238. Clayton James E. (Londonderry NH), Signal in-line memory module.
  239. Clayton James E. (Londonderry NH), Single in-line memory module.
  240. Coller James R. (Kernersville NC) Goodman Joseph R. (Walkertown NC), Socket for stacking integrated circuit packages.
  241. Osaka Hideki,JPX ; Umemura Masaya ; Yamagiwa Akira,JPX ; Takekuma Toshitsugu,JPX, Source-clock-synchronized memory system and memory unit.
  242. Suwabe, Shigekazu; Noguchi, Shin; Tajima, Yasunari; Shigematsu, Satoshi, Spin valve magnetic head with three underlayers.
  243. Hacke Hans-Juergen,DEX, Stack arrangement for two semiconductor memory chips and printed board for accepting a plurality of such stack arrangements.
  244. Corisis David J. ; Brooks Jerry M. ; Moden Walter L., Stackable ball grid array package.
  245. Forthun John A., Stackable chip package with flex carrier.
  246. John A. Forthun, Stackable chip package with flex carrier.
  247. Harlan R. Isaak, Stackable flex circuit IC package and method of making same.
  248. Isaak Harlan R., Stackable flex circuit IC package and method of making same.
  249. Isaak, Harlan R., Stackable flex circuit IC package and method of making same.
  250. Harlan R. Isaak, Stackable flex circuit chip package and method of making same.
  251. Harlan R. Isaak, Stackable flex circuit chip package and method of making same.
  252. Lauffer Donald K. (San Diego CA) Sanwo Ikuo J. (San Marcos CA) Rostek Paul M. (San Diego CA), Stackable integrated circuit chip package with improved heat removal.
  253. Kane Milburn H. (Austin TX) Roby John G. (Cedar Park TX) Schrottke Gustav (Austin TX), Stacked DCA memory chips.
  254. Igor Y. Khandros ; Thomas H. DiStefano, Stacked chip assembly.
  255. Salatino Matthew M. (Satellite Beach FL), Stacked configuration for integrated circuit devices.
  256. Akram Salman, Stacked leads-over chip multi-chip module.
  257. Kim Young ; Haba Belgacem ; Solberg Vernon, Stacked microelectronic assembly and method therefor.
  258. Kim, Young; Haba, Belgacem; Solberg, Vernon, Stacked microelectronic assembly and method therefor.
  259. Solberg Vernon, Stacked microelectronic assembly and method therefor.
  260. Corisis,David J., Stacked microelectronic dies.
  261. Levardo, Melvin N., Stacked microelectronic packages.
  262. Wang, Hsing-Seng; Lee, Rong-Shen; Wang, Chia-Chung, Stacked semiconductor package formed on a substrate and method for fabrication.
  263. Moon, Ow Chee; Koon, Eng Meow, Stacked-die assemblies with a plurality of microelectronic devices and methods of manufacture.
  264. Lin Paul T. (Austin TX) McShane Michael B. (Austin TX), Stacking three dimensional leadless multi-chip module and method for making the same.
  265. Fields Walter D. (Beaverton OR) Larkins Gary K. (Beaverton OR), Strip line circuit component and method of manufacture.
  266. Dumont, Bernard; Proponet, Christian; Bancelin, Bernard; Brucker, Roland; Bories, Jean-Louis; Klein, Christiane, Structure for assembling complex electronic circuits.
  267. Hsueh, Paul, Structure for removable cooler.
  268. Dell Timothy J. (Colchester VT) Farah Lina S. (Burlington VT) Feng George C. (Essex Junction VT) Kellogg Mark W. (Essex Junction VT), Synchronous memory packaged in single/dual in-line memory module and method of fabrication.
  269. Lee James C. K. (Los Altos Hills CA) Amdahl Gene M. (Atherton CA) Beck Richard (Cupertino CA) Lee Chune (San Francisco CA) Hu Edward (Sunnyvale CA), System for detachably mounting semiconductors on conductor substrate.
  270. Bartilson Bradley W., System for stacking of integrated circuit packages.
  271. Goodwin,Paul, Thin module system and method.
  272. Clayton,James E.; Fathi,Zakaryae, Thin multichip flex-module.
  273. Clayton,James E.; Fathi,Zakaryae, Thin multichip flex-module.
  274. Clayton James E., Thin multichip module.
  275. Clayton James E., Thin multichip module.
  276. Clayton James E., Thin multichip module.
  277. Clayton James E. (10605 Marbury Ct. Austin TX 78726-1312), Thin multichip module.
  278. Clayton James E., Thin multichip module including a connector frame socket.
  279. Clayton James E., Thin multichip module including a connector frame socket having first and second apertures.
  280. Yoshimura Yoshimasa (Itami JPX), Thin multilayered IC memory card.
  281. Woodman John K. (601 Mystic La. Foster City CA 94404), Three dimensional integrated circuit package.
  282. Davidson Howard L. (San Carlos CA), Three dimensional packaging arrangement for computer systems and the like.
  283. Tessier Theodore G. ; Stafford John W. ; Jandzinski David A., Three dimensional semiconductor package having flexible appendages.
  284. Berhold G. Mark (7752 Steffensen Dr. Salt Lake City UT 84121), Three-dimensional circuit component assembly and method corresponding thereto.
  285. Nicewarner ; Jr. Earl R. (Gaithersburg MD) Frinak Steven L. (Middletown MD), Three-dimensional flexible assembly of integrated circuits.
  286. Nicewarner ; Jr. Earl R. ; Frinak Steven L., Three-dimensional flexible assembly of integrated circuits.
  287. Harlan R. Isaak, Three-dimensional memory stacking using anisotropic epoxy interconnections.
  288. Nicewarner ; Jr. Earl R. (Gaithersburg MD), Three-dimensional modular assembly of integrated circuits.
  289. Lin Paul T. (Austin TX), Three-dimensional multi-chip pad array carrier.
  290. Osamu Nakayama JP; Toshinori Hosoma JP; Takuhiro Ishii JP, Three-dimensional wiring board and electric insulating member for wiring board.
  291. Burns Carmen D., Ultra-high density warp-resistant memory module.
  292. Burns Carmen D. (Austin TX), Ultra-high density warp-resistant memory module.
  293. Andrew C. Ross, Universal package and method of forming the same.
  294. Ross Andrew C., Universal package and method of forming the same.
  295. Lin Hao-Chou (San Jose CA), Universal test socket for exposing the active surface of an integrated circuit in a die-down package.
  296. Johnson Brian P. ; Freker Dave, Using FET switches for large memory arrays.
  297. Harris David B. (Columbia MD) Karr Scott P. (Columbia MD) Reinhart Stephen J. (Annapolis MD), VLSI integration into a 3-D WSI dual composite module.
  298. Ingraham Anthony P. ; Kehley Glenn L. ; Sathe Sanjeev B. ; Slack John R., Vertically integrated multi-chip circuit package with heat-sink support.

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