초록 ▼

The variable latency associated with standard network forwarding devices is eliminated by forwarding timing packets through a network forwarding device with a constant delay. The network forwarding device of the invention time stamps timing packets that are received by the input ports with a predefi

The variable latency associated with standard network forwarding devices is eliminated by forwarding timing packets through a network forwarding device with a constant delay. The network forwarding device of the invention time stamps timing packets that are received by the input ports with a predefined future time, and then outputs the timing packets from the output ports at the predefined time so that the transmission delay through the network forwarding device is the same from any port to any other port.

대표청구항 ▼

What is claimed is: 1. A forwarding device comprising: a plurality of input/output nodes; and a forwarding mechanism connected to the input/output nodes to forward a plurality of timing packets, the forwarding mechanism ensuring that all timing packets that are required to make a time determination

What is claimed is: 1. A forwarding device comprising: a plurality of input/output nodes; and a forwarding mechanism connected to the input/output nodes to forward a plurality of timing packets, the forwarding mechanism ensuring that all timing packets that are required to make a time determination have substantially an identical delay when passing through the forwarding mechanism, the forwarding mechanism including: a plurality of transceivers connected to the plurality of input/output nodes; a plurality of time stamp circuits connected to the plurality of transceivers, the time stamp circuits adding a stamp time to a packet when the packet is received to form a time stamped packet, and outputting the time stamped packet; a plurality of timing packet detector circuits connected to the plurality of time stamp circuits, the timing packet detector circuits identifying timing packets from non-timing packets; and a forwarding circuit connected to the plurality of timing packet detector circuits. 2. The forwarding device of claim 1 wherein the forwarding circuit receives a timing packet from a timing packet detector, holds the timing packet, and then forwards the timing packet to the transceivers that are to receive the timing packet so that the timing packet is output at the stamp time or a time derived from the stamp time. 3. The forwarding device of claim 1 wherein the forwarding circuit ensures that every timing packet passes through the forwarding circuit with a substantially identical delay when propagation delays through the transceivers and time stamp circuits are substantially identical on both upstream and downstream paths. 4. A forwarding device comprising: a plurality of input/output nodes; and a forwarding mechanism connected to the input/output nodes to forward a plurality of timing packets, the forwarding mechanism ensuring that all timing packets that are required to make a time determination have substantially an identical delay when passing through the forwarding mechanism, the forwarding mechanism including: a plurality of transceivers connected to the plurality of input/output nodes; a plurality of time stamp circuits connected to the plurality of transceivers, the time stamp circuits adding a stamp time to a packet when the packet is received to form a time stamped packet, and outputting the time stamped packet; a plurality of timing packet detector circuits connected to the plurality of time stamp circuits, the timing packet detector circuits identifying timing packets from non-timing packets; a plurality of message detector circuits connected to the plurality of timing packet detector circuits; and a forwarding circuit connected to the plurality of message detector circuits. 5. The forwarding device of claim 4 wherein the forwarding circuit receives a timing packet from a message detector, holds the timing packet, and then forwards the timing packet to the transceivers that are to receive the timing packet so that the timing packet is output at the stamp time or a time derived from the stamp time. 6. The forwarding device of claim 5 wherein the forwarding circuit ensures that every timing packet required to make a first time determination passes through the forwarding circuit with a first substantially identical delay when propagation delays through the transceivers and time stamp circuits are substantially identical on both upstream and downstream paths. 7. The forwarding device of claim 6 wherein the forwarding circuit ensures that every timing packet required to make a second time determination passes through the forwarding circuit with a second substantially identical delay when propagation delays through the transceivers and time stamp circuits are substantially identical on both upstream and downstream paths, the first and second delays being different. 8. The forwarding device of claim 4 wherein the forwarding circuit includes: fowarding circuitry; a port delay buffer connected to the fowarding circuitry to receive a plurality of time stamped timing packets from the fowarding circuitry; and a launch control circuit connected to the port delay buffer and a transceiver, the launch control circuit taking a time stamped timing packet from the port delay buffer and outputting the time stamped timing packet to the transceiver based on the time stamp.