Method for implementing radiation hardened, power efficient, non isolated low output voltage DC/DC converters with non-radiation hardened components
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G05F-001/44
G05F-001/10
출원번호
UP-0599146
(2006-11-14)
등록번호
US-7635970
(2010-01-08)
발명자
/ 주소
Summer, Steven E.
대리인 / 주소
Feldman Law Group, P.C.
인용정보
피인용 횟수 :
2인용 특허 :
17
초록▼
A method of producing an economical DC/DC converter that efficiently produces a relatively low output voltage and operates in a high ionizing radiation dose environment such as found in spacecraft and particle accelerator applications. That is, the converter comprises two P-channel FETs, a switching
A method of producing an economical DC/DC converter that efficiently produces a relatively low output voltage and operates in a high ionizing radiation dose environment such as found in spacecraft and particle accelerator applications. That is, the converter comprises two P-channel FETs, a switching means for switching conductivity between the two P-channel FETs, and output means for outputting an output voltage. The output voltage being a step-down voltage that is unaffected by high-ionizing radiation such that is found in space or particle accelerators.
대표청구항▼
What is claimed is: 1. A buck converter for producing relatively low output voltages comprising: input means for inputting an input voltage; two P channel FETS including a first P-channel FET and a second P-channel FET; switching means for switching conductively between the first P-channel FET and
What is claimed is: 1. A buck converter for producing relatively low output voltages comprising: input means for inputting an input voltage; two P channel FETS including a first P-channel FET and a second P-channel FET; switching means for switching conductively between the first P-channel FET and the second P-channel FET, said switching means includes pulse modulation means for turning off one of said two P-channel FETS before turning on another of said two P channel FETs so as to avoid simultaneous conduction of said two P-channel FETs; and output means for outputting an output voltage, said output voltage being a step-down voltage, whereby the output voltage is lower than the input voltage; and wherein the first P-channel FET, second P-channel FET and the output voltage are unaffected by high-ionizing radiation such that is found in space or particle accelerators. 2. The buck converter, as claimed in claim 1, further comprising: scaling means for scaling the output voltage to a nominal level. 3. The buck converter, as claimed in claim 2, further comprising: control means for controlling a current flow through said first and second P-channel FET. 4. The buck converter, as claimed in claim 3, further comprising: determining means for determining an output pulse width. 5. The buck converter, as claimed in claim 4, further comprising: soft-starting means for raising/lowering the output voltage at a controlled rate. 6. The buck converter, as claimed in claim 5, further comprising: monitoring means for monitoring an operating status of the converter. 7. The buck converter, as claimed in claim 6, further comprising: disabling means for disabling the output voltage of the converter. 8. The buck converter, as claimed in claim 7, further comprising: synchronizing means for synchronizing a switching frequency. 9. The buck converter, as claimed in claim 8, further comprising: protecting means for controlling a temporal relationship between the first and second FET's. 10. A boost converter for producing voltages of negative polarity comprising: two P channel FETS including a first P-channel FET and a second P-channel FET; switching means for switching conductivity between the first P-channel FET and a second P-channel FET, said switching means includes pulse modulation means for turning off one of said two P-channel FETS before turning on another of said two P channel FETs so as to avoid simultaneous conduction of said two P-channel FETs; and output means for outputting an output voltage, said output voltage being a step-up voltage, whereby the output voltage generated is of negative polarity, and wherein the first P-channel FET, the second P-channel FET and the output voltage are unaffected by high-ionizing radiation such that is found in space or particle accelerators. 11. The boost converter, as claimed in claim 10, further comprising: scaling means for scaling the output voltage to a nominal level. 12. The boost converter, as claimed in claim 11, further comprising: control means for controlling a current flow through said first and second P-channel FET. 13. The boost converter, as claimed in claim 12, further comprising: determining means for determining an output pulse width. 14. The boost converter, as claimed in claim 13, further comprising: soft-starting means for rising the output voltage at a controlled rate. 15. The boost converter, as claimed in claim 14, further comprising: monitoring means for monitoring an operating status of the converter. 16. The boost converter, as claimed in claim 15, further comprising: disabling means for disabling the output voltage of the converter. 17. The boost converter, as claimed in claim 16, further comprising: synchronizing means for synchronizing a switching frequency. 18. The boost converter, as claimed in claim 17, further comprising: protecting means for controlling a temporal relationship between the first and second FET's.
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이 특허에 인용된 특허 (17)
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