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System and method for providing quality of service in asynchronous transfer mode cell transmission

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H04L-001/00
출원번호 UP-0746235 (2003-12-29)
등록번호 US-7643413 (2010-02-11)
발명자 / 주소
  • Milway, David
  • Stoye, William
출원인 / 주소
  • Brooktree Broadband Holding, Inc.
대리인 / 주소
    Thomas, Kayden, Horstemeyer & Risley, LLP
인용정보 피인용 횟수 : 0  인용 특허 : 29

초록

A method and apparatus for scheduling the transmission of cells onto an network, or other packet switching network, is disclosed. The central feature of the scheduling mechanism is a quality of service engine (QoS Engine) which accelerates the processing of packets in a packet switching networks, su

대표청구항

What is claimed: 1. A method of accelerating processing of packet-based traffic in a packet switching network, comprising: providing a quality of service engine for accelerating processing of packet-based traffic by pacing a plurality of virtual circuits, the packet-based traffic including at least

이 특허에 인용된 특허 (29)

  1. Umehira Masahiro,JPX ; Satoh Hijin,JPX ; Sugiyama Takatoshi,JPX ; Ohta Atsushi,JPX ; Sagawa Yuichi,JPX, ATM cell transport system for wireless communications.
  2. Stephen A. Hauser ; Stephen A. Caldara ; Thomas A. Manning, Asynchronous transfer mode based service consolidation switch.
  3. Greenblat,Ilia; Refaeli,Moshe, Communications system using rings architecture.
  4. Robert Daniel Maher, III ; Aswinkumar Vishanji Rana ; Milton Andre Lie ; Kevin William Brandon ; Mark Warden Hervin ; Corey Alan Garrow, Content processor.
  5. Ma Patrick S. ; Graham Gregory S., Dynamic control processes and systems for asynchronous transfer mode networks.
  6. Ambe, Shekhar; Kadambi, Shiri; Relan, Sandeep, Fast flexible filter processor based architecture for a network device.
  7. Paul,Harry V.; Tornetta,Anthony G.; Gonzalez,Henry G.; Cantwell,Larry; Koellner,Gregory L.; Schmidt,Steven G.; Pearson,Jereld W.; Workman,Jason; Wright,James C.; Carlsen,Scott; Nallur,Govindaswamy, Fiber channel switch.
  8. Flavio Giovanni Bonomi ; Kannan Devarajan, Flexible scheduler in an asynchronous transfer mode (ATM) switch.
  9. Bass, Brian Mitchell; Calvignac, Jean Louis; Heddes, Marco C.; Maragkos, Antonios; Patel, Piyush Chunilal; Siegel, Michael Steven; Verplanken, Fabrice Jean, Full match (FM) search algorithm implementation for a network processor.
  10. Chiussi, Fabio M.; Sivaraman, Vijay, Guaranteeing data transfer delays in data packet networks using earliest deadline first packet schedulers.
  11. Pettey,Christopher J.; Riley,Dwight, High speed peripheral interconnect apparatus, method and system.
  12. Basak, Debashis; Adams, Jay P., Method and apparatus for leaky bucket based out-bound shaping in an ATM scheduler.
  13. Shtayer Ronen (Tel-Aviv ILX) Alon Naveh (Ranat Hashnron ILX) Alexander Joffe (Rehovot ILX), Method and apparatus for pacing asynchronous transfer mode (ATM) data cell transmission.
  14. Kadambi Shiri ; Ambe Shekhar, Method for sending packets between trunk ports of network switches.
  15. Johnson,Ian David; Collins,Michael Patrick Robert; Howarth,Paul, Method of transmitting information through data switching apparatus and apparatus therefor.
  16. Hung-Hsiang Jonathan Chao ; Yau-Ren Jenq, Methods and apparatus for fairly scheduling queued packets using a ram-based search engine.
  17. Bass, Brian Mitchell; Calvignac, Jean Louis; Gallo, Anthony Matteo; Heddes, Marco C.; Siegel, Michael Steven; Verplanken, Fabrice Jean, Network processor for multiprotocol data flows.
  18. Boucher Laurence B. ; Blightman Stephen E. J. ; Craft Peter K. ; Higgen David A. ; Philbrick Clive M. ; Starr Daryl D., Passing a communication control block from host to a local device such that a message is processed on the device.
  19. Zheng, Qin; Willis, Steven R.; Kastenholz, Frank; Crawley, Eric, Quality of service facility in a device for performing IP forwarding and ATM switching.
  20. Yin Nanying ; Borden Marty ; Li Shiping ; Hluchyj Michael, Queue service interval based cell scheduler with hierarchical queuing configurations.
  21. Rogers Landis C. ; Kappler Christopher J. ; Lyles J. Bryan, Rate shaping in per-flow output queued routing mechanisms for statistical bit rate service.
  22. Lyles J. Bryan ; Rogers Landis C. ; Kappler Christopher J., Rate shaping in per-flow queued routing mechanisms for available bit rate service.
  23. Lyles Joseph B. (Mountain View CA), Reservation ring mechanism for providing fair queued access in a fast packet switch networks.
  24. Creta,Kenneth C.; Spink,Aaron T.; Blankenship,Robert G., Separating transactions into different virtual channels.
  25. Kilkki Matti Kalevi,FIX ; Ruutu Jussi Pekka Olavi,FIX, System and method for determining network bandwidth availability using priority level feedback.
  26. Onvural,O. Raif; O'Connor,Robin; Viniotis,Ioannis, Time based packet scheduling and sorting system.
  27. Ruixue Fan ; Brian L. Mark ; Gopalakrishan Ramamurthy ; Alexander T. Ishii, Time-based scheduler architecture and method for ATM networks.
  28. Lee,Barry; Ono,Golchiro; Trinh,Man Dieu; Bleszynski,Ryszard, Vertical instruction and data processing in a network processor architecture.
  29. Sang, Jinqlih; Yang, Edward, Weighted round robin cell architecture.
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